i2c.c 7.4 KB

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  1. /*
  2. * (C) Copyright 2003 - 2009
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. *
  7. * Based on the MPC5xxx code.
  8. */
  9. #include <common.h>
  10. #include <asm/io.h>
  11. DECLARE_GLOBAL_DATA_PTR;
  12. #ifdef CONFIG_HARD_I2C
  13. #include <i2c.h>
  14. /* by default set I2C bus 0 active */
  15. static unsigned int bus_num __attribute__ ((section (".data"))) = 0;
  16. #define I2C_TIMEOUT 100
  17. #define I2C_RETRIES 3
  18. struct mpc512x_i2c_tap {
  19. int scl2tap;
  20. int tap2tap;
  21. };
  22. static int mpc_reg_in(volatile u32 *reg);
  23. static void mpc_reg_out(volatile u32 *reg, int val, int mask);
  24. static int wait_for_bb(void);
  25. static int wait_for_pin(int *status);
  26. static int do_address(uchar chip, char rdwr_flag);
  27. static int send_bytes(uchar chip, char *buf, int len);
  28. static int receive_bytes(uchar chip, char *buf, int len);
  29. static int mpc_get_fdr(int);
  30. static int mpc_reg_in (volatile u32 *reg)
  31. {
  32. int ret = in_be32(reg) >> 24;
  33. return ret;
  34. }
  35. static void mpc_reg_out (volatile u32 *reg, int val, int mask)
  36. {
  37. if (!mask) {
  38. out_be32(reg, val << 24);
  39. } else {
  40. clrsetbits_be32(reg, mask << 24, (val & mask) << 24);
  41. }
  42. }
  43. static int wait_for_bb (void)
  44. {
  45. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  46. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  47. int timeout = I2C_TIMEOUT;
  48. int status;
  49. status = mpc_reg_in (&regs->msr);
  50. while (timeout-- && (status & I2C_BB)) {
  51. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  52. (void)mpc_reg_in(&regs->mdr);
  53. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  54. mpc_reg_out (&regs->mcr, 0, 0);
  55. mpc_reg_out (&regs->mcr, I2C_EN, 0);
  56. udelay (1000);
  57. status = mpc_reg_in (&regs->msr);
  58. }
  59. return (status & I2C_BB);
  60. }
  61. static int wait_for_pin (int *status)
  62. {
  63. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  64. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  65. int timeout = I2C_TIMEOUT;
  66. *status = mpc_reg_in (&regs->msr);
  67. while (timeout-- && !(*status & I2C_IF)) {
  68. udelay (1000);
  69. *status = mpc_reg_in (&regs->msr);
  70. }
  71. if (!(*status & I2C_IF)) {
  72. return -1;
  73. }
  74. mpc_reg_out (&regs->msr, 0, I2C_IF);
  75. return 0;
  76. }
  77. static int do_address (uchar chip, char rdwr_flag)
  78. {
  79. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  80. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  81. int status;
  82. chip <<= 1;
  83. if (rdwr_flag) {
  84. chip |= 1;
  85. }
  86. mpc_reg_out (&regs->mcr, I2C_TX, I2C_TX);
  87. mpc_reg_out (&regs->mdr, chip, 0);
  88. if (wait_for_pin (&status)) {
  89. return -2;
  90. }
  91. if (status & I2C_RXAK) {
  92. return -3;
  93. }
  94. return 0;
  95. }
  96. static int send_bytes (uchar chip, char *buf, int len)
  97. {
  98. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  99. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  100. int wrcount;
  101. int status;
  102. for (wrcount = 0; wrcount < len; ++wrcount) {
  103. mpc_reg_out (&regs->mdr, buf[wrcount], 0);
  104. if (wait_for_pin (&status)) {
  105. break;
  106. }
  107. if (status & I2C_RXAK) {
  108. break;
  109. }
  110. }
  111. return !(wrcount == len);
  112. }
  113. static int receive_bytes (uchar chip, char *buf, int len)
  114. {
  115. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  116. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  117. int dummy = 1;
  118. int rdcount = 0;
  119. int status;
  120. int i;
  121. mpc_reg_out (&regs->mcr, 0, I2C_TX);
  122. for (i = 0; i < len; ++i) {
  123. buf[rdcount] = mpc_reg_in (&regs->mdr);
  124. if (dummy) {
  125. dummy = 0;
  126. } else {
  127. rdcount++;
  128. }
  129. if (wait_for_pin (&status)) {
  130. return -4;
  131. }
  132. }
  133. mpc_reg_out (&regs->mcr, I2C_TXAK, I2C_TXAK);
  134. buf[rdcount++] = mpc_reg_in (&regs->mdr);
  135. if (wait_for_pin (&status)) {
  136. return -5;
  137. }
  138. mpc_reg_out (&regs->mcr, 0, I2C_TXAK);
  139. return 0;
  140. }
  141. /**************** I2C API ****************/
  142. void i2c_init (int speed, int saddr)
  143. {
  144. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  145. int i;
  146. for (i = 0; i < I2C_BUS_CNT; i++){
  147. volatile i2c512x_dev_t *regs = &im->i2c.dev[i];
  148. mpc_reg_out (&regs->mcr, 0, 0);
  149. /* Set clock */
  150. mpc_reg_out (&regs->mfdr, mpc_get_fdr (speed), 0);
  151. mpc_reg_out (&regs->madr, saddr << 1, 0);
  152. /* Enable module */
  153. mpc_reg_out (&regs->mcr, I2C_EN, I2C_INIT_MASK);
  154. mpc_reg_out (&regs->msr, 0, I2C_IF);
  155. }
  156. /* Disable interrupts */
  157. out_be32(&im->i2c.icr, 0);
  158. /* Turn off filters */
  159. out_be32(&im->i2c.mifr, 0);
  160. }
  161. static int mpc_get_fdr (int speed)
  162. {
  163. static int fdr = -1;
  164. if (fdr == -1) {
  165. ulong best_speed = 0;
  166. ulong divider;
  167. ulong ips, scl;
  168. ulong bestmatch = 0xffffffffUL;
  169. int best_i = 0, best_j = 0, i, j;
  170. int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
  171. struct mpc512x_i2c_tap scltap[] = {
  172. {4, 1},
  173. {4, 2},
  174. {6, 4},
  175. {6, 8},
  176. {14, 16},
  177. {30, 32},
  178. {62, 64},
  179. {126, 128}
  180. };
  181. ips = gd->arch.ips_clk;
  182. for (i = 7; i >= 0; i--) {
  183. for (j = 7; j >= 0; j--) {
  184. scl = 2 * (scltap[j].scl2tap +
  185. (SCL_Tap[i] - 1) * scltap[j].tap2tap
  186. + 2);
  187. if (ips <= speed*scl) {
  188. if ((speed*scl - ips) < bestmatch) {
  189. bestmatch = speed*scl - ips;
  190. best_i = i;
  191. best_j = j;
  192. best_speed = ips/scl;
  193. }
  194. }
  195. }
  196. }
  197. divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
  198. if (gd->flags & GD_FLG_RELOC) {
  199. fdr = divider;
  200. } else {
  201. debug("%ld kHz, \n", best_speed / 1000);
  202. return divider;
  203. }
  204. }
  205. return fdr;
  206. }
  207. int i2c_probe (uchar chip)
  208. {
  209. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  210. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  211. int i;
  212. for (i = 0; i < I2C_RETRIES; i++) {
  213. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  214. if (! do_address (chip, 0)) {
  215. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  216. udelay (500);
  217. break;
  218. }
  219. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  220. udelay (500);
  221. }
  222. return (i == I2C_RETRIES);
  223. }
  224. int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
  225. {
  226. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  227. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  228. char xaddr[4];
  229. int ret = -1;
  230. xaddr[0] = (addr >> 24) & 0xFF;
  231. xaddr[1] = (addr >> 16) & 0xFF;
  232. xaddr[2] = (addr >> 8) & 0xFF;
  233. xaddr[3] = addr & 0xFF;
  234. if (wait_for_bb ()) {
  235. printf ("i2c_read: bus is busy\n");
  236. goto Done;
  237. }
  238. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  239. if (do_address (chip, 0)) {
  240. printf ("i2c_read: failed to address chip\n");
  241. goto Done;
  242. }
  243. if (send_bytes (chip, &xaddr[4-alen], alen)) {
  244. printf ("i2c_read: send_bytes failed\n");
  245. goto Done;
  246. }
  247. mpc_reg_out (&regs->mcr, I2C_RSTA, I2C_RSTA);
  248. if (do_address (chip, 1)) {
  249. printf ("i2c_read: failed to address chip\n");
  250. goto Done;
  251. }
  252. if (receive_bytes (chip, (char *)buf, len)) {
  253. printf ("i2c_read: receive_bytes failed\n");
  254. goto Done;
  255. }
  256. ret = 0;
  257. Done:
  258. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  259. return ret;
  260. }
  261. int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
  262. {
  263. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  264. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  265. char xaddr[4];
  266. int ret = -1;
  267. xaddr[0] = (addr >> 24) & 0xFF;
  268. xaddr[1] = (addr >> 16) & 0xFF;
  269. xaddr[2] = (addr >> 8) & 0xFF;
  270. xaddr[3] = addr & 0xFF;
  271. if (wait_for_bb ()) {
  272. printf ("i2c_write: bus is busy\n");
  273. goto Done;
  274. }
  275. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  276. if (do_address (chip, 0)) {
  277. printf ("i2c_write: failed to address chip\n");
  278. goto Done;
  279. }
  280. if (send_bytes (chip, &xaddr[4-alen], alen)) {
  281. printf ("i2c_write: send_bytes failed\n");
  282. goto Done;
  283. }
  284. if (send_bytes (chip, (char *)buf, len)) {
  285. printf ("i2c_write: send_bytes failed\n");
  286. goto Done;
  287. }
  288. ret = 0;
  289. Done:
  290. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  291. return ret;
  292. }
  293. int i2c_set_bus_num (unsigned int bus)
  294. {
  295. if (bus >= I2C_BUS_CNT) {
  296. return -1;
  297. }
  298. bus_num = bus;
  299. return 0;
  300. }
  301. unsigned int i2c_get_bus_num (void)
  302. {
  303. return bus_num;
  304. }
  305. #endif /* CONFIG_HARD_I2C */