m5253.h 1.6 KB

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  1. /*
  2. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  3. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef m5253_h
  8. #define m5253_h
  9. /****************************************************************************/
  10. /*
  11. * PLL Module (PLL)
  12. */
  13. /* Register read/write macros */
  14. #define PLL_PLLCR (0x000180)
  15. #define SIM_RSR (0x000000)
  16. #define SIM_SYPCR (0x000001)
  17. #define SIM_SWIVR (0x000002)
  18. #define SIM_SWSR (0x000003)
  19. #define SIM_MPARK (0x00000C)
  20. /* Bit definitions and macros for RSR */
  21. #define SIM_RSR_SWTR (0x20)
  22. #define SIM_RSR_HRST (0x80)
  23. /* Register read/write macros */
  24. #define CIM_MISCCR (0x000500)
  25. #define CIM_ATA_DADDR (0x000504)
  26. #define CIM_ATA_DCOUNT (0x000508)
  27. #define CIM_RTC_TIME (0x00050C)
  28. #define CIM_USB_CANCLK (0x000510)
  29. /* Bit definitions and macros for MISCCR */
  30. #define CIM_MISCCR_ADTA (0x00000001)
  31. #define CIM_MISCCR_ADTD (0x00000002)
  32. #define CIM_MISCCR_ADIE (0x00000004)
  33. #define CIM_MISCCR_ADIC (0x00000008)
  34. #define CIM_MISCCR_ADIP (0x00000010)
  35. #define CIM_MISCCR_CPUEND (0x00000020)
  36. #define CIM_MISCCR_DMAEND (0x00000040)
  37. #define CIM_MISCCR_RTCCLR (0x00000080)
  38. #define CIM_MISCCR_RTCPL (0x00000100)
  39. #define CIM_MISCCR_URIE (0x00000800)
  40. #define CIM_MISCCR_URIC (0x00001000)
  41. #define CIM_MISCCR_URIP (0x00002000)
  42. /* Bit definitions and macros for ATA_DADDR */
  43. #define CIM_ATA_DADDR_ATAADDR(x) (((x)&0x00003FFF)<<2)
  44. #define CIM_ATA_DADDR_RAMADDR(x) (((x)&0x00003FFF)<<18)
  45. /* Bit definitions and macros for ATA_DCOUNT */
  46. #define CIM_ATA_DCOUNT_COUNT(x) (((x)&0x0000FFFF))
  47. #endif /* m5253_h */