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u-boot-2017.01+gitAUTOINC+340fb36f04-g340fb36f04
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arch
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arm
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mach-uniphier
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boot-mode
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boot-mode-ld4.c

boot-mode-ld4.c 2.7 KB
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  1. /*
    2. 

  2.  * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
    3. 

  3.  *
    4. 

  4.  * SPDX-License-Identifier:	GPL-2.0+
    5. 

  5.  */
    6. 

  6. 

  7. #include <common.h>
    8. 

  8. #include <spl.h>
    9. 

  9. #include <linux/io.h>
    10. 

  10. 

  11. #include "../sg-regs.h"
    12. 

  12. #include "boot-device.h"
    13. 

  13. 

  14. struct boot_device_info boot_device_table[] = {
    15. 

  15. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 4)"},
    16. 

  16. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 128KB, Addr 5)"},
    17. 

  17. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
    18. 

  18. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 256KB, Addr 5)"},
    19. 

  19. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
    20. 

  20. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, EraseSize 512KB, Addr 5)"},
    21. 

  21. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
    22. 

  22. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize   1MB, Addr 5)"},
    23. 

  23. 	{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize   1MB, Addr 5)"},
    24. 

  24. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 128KB, Addr 5)"},
    25. 

  25. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
    26. 

  26. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 256KB, Addr 5)"},
    27. 

  27. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
    28. 

  28. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, EraseSize 512KB, Addr 5)"},
    29. 

  29. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
    30. 

  30. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, EraseSize 512KB, Addr 5)"},
    31. 

  31. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 4)"},
    32. 

  32. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC  8, ONFI,            Addr 5)"},
    33. 

  33. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI,            Addr 5)"},
    34. 

  34. 	{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI,            Addr 5)"},
    35. 

  35. 	{BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI,            Addr 5)"},
    36. 

  36. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC  8, ONFI,            Addr 5)"},
    37. 

  37. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI,            Addr 5)"},
    38. 

  38. 	{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI,            Addr 5)"},
    39. 

  39. 	{BOOT_DEVICE_MMC1, "eMMC (3.3V)"},
    40. 

  40. 	{BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
    41. 

  41. 	{BOOT_DEVICE_NONE, "Reserved"},
    42. 

  42. 	{BOOT_DEVICE_NONE, "Reserved"},
    43. 

  43. 	{BOOT_DEVICE_NONE, "Reserved"},
    44. 

  44. 	{BOOT_DEVICE_NONE, "Reserved"},
    45. 

  45. 	{BOOT_DEVICE_NONE, "Reserved"},
    46. 

  46. 	{BOOT_DEVICE_NOR,  "NOR  (XECS0)"},
    47. 

  47. };
    48. 

  48. 

  49. static int get_boot_mode_sel(void)
    50. 

  50. {
    51. 

  51. 	return (readl(SG_PINMON0) >> 1) & 0x1f;
    52. 

  52. }
    53. 

  53. 

  54. u32 uniphier_ld4_boot_device(void)
    55. 

  55. {
    56. 

  56. 	int boot_mode;
    57. 

  57. 

  58. 	boot_mode = get_boot_mode_sel();
    59. 

  59. 

  60. 	return boot_device_table[boot_mode].type;
    61. 

  61. }
    62. 

  62. 

  63. void uniphier_ld4_boot_mode_show(void)
    64. 

  64. {
    65. 

  65. 	int mode_sel, i;
    66. 

  66. 

  67. 	mode_sel = get_boot_mode_sel();
    68. 

  68. 

  69. 	puts("Boot Mode Pin:\n");
    70. 

  70. 

  71. 	for (i = 0; i < ARRAY_SIZE(boot_device_table); i++)
    72. 

  72. 		printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i,
    73. 

  73. 		       boot_device_table[i].info);
    74. 

  74. }
    75.