funcmux.c 8.7 KB

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  1. /*
  2. * Copyright (c) 2011 The Chromium OS Authors.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. /* Tegra20 high-level function multiplexing */
  7. #include <common.h>
  8. #include <asm/arch/clock.h>
  9. #include <asm/arch/funcmux.h>
  10. #include <asm/arch/pinmux.h>
  11. /*
  12. * The PINMUX macro is used to set up pinmux tables.
  13. */
  14. #define PINMUX(grp, mux, pupd, tri) \
  15. {PMUX_PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
  16. static const struct pmux_pingrp_config disp1_default[] = {
  17. PINMUX(LDI, DISPA, NORMAL, NORMAL),
  18. PINMUX(LHP0, DISPA, NORMAL, NORMAL),
  19. PINMUX(LHP1, DISPA, NORMAL, NORMAL),
  20. PINMUX(LHP2, DISPA, NORMAL, NORMAL),
  21. PINMUX(LHS, DISPA, NORMAL, NORMAL),
  22. PINMUX(LM0, RSVD4, NORMAL, NORMAL),
  23. PINMUX(LPP, DISPA, NORMAL, NORMAL),
  24. PINMUX(LPW0, DISPA, NORMAL, NORMAL),
  25. PINMUX(LPW2, DISPA, NORMAL, NORMAL),
  26. PINMUX(LSC0, DISPA, NORMAL, NORMAL),
  27. PINMUX(LSPI, DISPA, NORMAL, NORMAL),
  28. PINMUX(LVP1, DISPA, NORMAL, NORMAL),
  29. PINMUX(LVS, DISPA, NORMAL, NORMAL),
  30. PINMUX(SLXD, SPDIF, NORMAL, NORMAL),
  31. };
  32. int funcmux_select(enum periph_id id, int config)
  33. {
  34. int bad_config = config != FUNCMUX_DEFAULT;
  35. switch (id) {
  36. case PERIPH_ID_UART1:
  37. switch (config) {
  38. case FUNCMUX_UART1_IRRX_IRTX:
  39. pinmux_set_func(PMUX_PINGRP_IRRX, PMUX_FUNC_UARTA);
  40. pinmux_set_func(PMUX_PINGRP_IRTX, PMUX_FUNC_UARTA);
  41. pinmux_tristate_disable(PMUX_PINGRP_IRRX);
  42. pinmux_tristate_disable(PMUX_PINGRP_IRTX);
  43. break;
  44. case FUNCMUX_UART1_UAA_UAB:
  45. pinmux_set_func(PMUX_PINGRP_UAA, PMUX_FUNC_UARTA);
  46. pinmux_set_func(PMUX_PINGRP_UAB, PMUX_FUNC_UARTA);
  47. pinmux_tristate_disable(PMUX_PINGRP_UAA);
  48. pinmux_tristate_disable(PMUX_PINGRP_UAB);
  49. bad_config = 0;
  50. break;
  51. case FUNCMUX_UART1_GPU:
  52. pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_UARTA);
  53. pinmux_tristate_disable(PMUX_PINGRP_GPU);
  54. bad_config = 0;
  55. break;
  56. case FUNCMUX_UART1_SDIO1:
  57. pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_UARTA);
  58. pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
  59. bad_config = 0;
  60. break;
  61. }
  62. if (!bad_config) {
  63. /*
  64. * Tegra appears to boot with function UARTA pre-
  65. * selected on mux group SDB. If two mux groups are
  66. * both set to the same function, it's unclear which
  67. * group's pins drive the RX signals into the HW.
  68. * For UARTA, SDB certainly overrides group IRTX in
  69. * practice. To solve this, configure some alternative
  70. * function on SDB to avoid the conflict. Also, tri-
  71. * state the group to avoid driving any signal onto it
  72. * until we know what's connected.
  73. */
  74. pinmux_tristate_enable(PMUX_PINGRP_SDB);
  75. pinmux_set_func(PMUX_PINGRP_SDB, PMUX_FUNC_SDIO3);
  76. }
  77. break;
  78. case PERIPH_ID_UART2:
  79. if (config == FUNCMUX_UART2_UAD) {
  80. pinmux_set_func(PMUX_PINGRP_UAD, PMUX_FUNC_UARTB);
  81. pinmux_tristate_disable(PMUX_PINGRP_UAD);
  82. }
  83. break;
  84. case PERIPH_ID_UART4:
  85. if (config == FUNCMUX_UART4_GMC) {
  86. pinmux_set_func(PMUX_PINGRP_GMC, PMUX_FUNC_UARTD);
  87. pinmux_tristate_disable(PMUX_PINGRP_GMC);
  88. }
  89. break;
  90. case PERIPH_ID_DVC_I2C:
  91. /* there is only one selection, pinmux_config is ignored */
  92. if (config == FUNCMUX_DVC_I2CP) {
  93. pinmux_set_func(PMUX_PINGRP_I2CP, PMUX_FUNC_I2C);
  94. pinmux_tristate_disable(PMUX_PINGRP_I2CP);
  95. }
  96. break;
  97. case PERIPH_ID_I2C1:
  98. /* support pinmux_config of 0 for now, */
  99. if (config == FUNCMUX_I2C1_RM) {
  100. pinmux_set_func(PMUX_PINGRP_RM, PMUX_FUNC_I2C);
  101. pinmux_tristate_disable(PMUX_PINGRP_RM);
  102. }
  103. break;
  104. case PERIPH_ID_I2C2: /* I2C2 */
  105. switch (config) {
  106. case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */
  107. pinmux_set_func(PMUX_PINGRP_DDC, PMUX_FUNC_I2C2);
  108. /* PTA to HDMI */
  109. pinmux_set_func(PMUX_PINGRP_PTA, PMUX_FUNC_HDMI);
  110. pinmux_tristate_disable(PMUX_PINGRP_DDC);
  111. break;
  112. case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */
  113. pinmux_set_func(PMUX_PINGRP_PTA, PMUX_FUNC_I2C2);
  114. /* set DDC_SEL to RSVDx (RSVD2 works for now) */
  115. pinmux_set_func(PMUX_PINGRP_DDC, PMUX_FUNC_RSVD2);
  116. pinmux_tristate_disable(PMUX_PINGRP_PTA);
  117. bad_config = 0;
  118. break;
  119. }
  120. break;
  121. case PERIPH_ID_I2C3: /* I2C3 */
  122. /* support pinmux_config of 0 for now */
  123. if (config == FUNCMUX_I2C3_DTF) {
  124. pinmux_set_func(PMUX_PINGRP_DTF, PMUX_FUNC_I2C3);
  125. pinmux_tristate_disable(PMUX_PINGRP_DTF);
  126. }
  127. break;
  128. case PERIPH_ID_SDMMC1:
  129. if (config == FUNCMUX_SDMMC1_SDIO1_4BIT) {
  130. pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
  131. pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
  132. }
  133. break;
  134. case PERIPH_ID_SDMMC2:
  135. if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) {
  136. pinmux_set_func(PMUX_PINGRP_DTA, PMUX_FUNC_SDIO2);
  137. pinmux_set_func(PMUX_PINGRP_DTD, PMUX_FUNC_SDIO2);
  138. pinmux_tristate_disable(PMUX_PINGRP_DTA);
  139. pinmux_tristate_disable(PMUX_PINGRP_DTD);
  140. }
  141. break;
  142. case PERIPH_ID_SDMMC3:
  143. switch (config) {
  144. case FUNCMUX_SDMMC3_SDB_SLXA_8BIT:
  145. pinmux_set_func(PMUX_PINGRP_SLXA, PMUX_FUNC_SDIO3);
  146. pinmux_set_func(PMUX_PINGRP_SLXC, PMUX_FUNC_SDIO3);
  147. pinmux_set_func(PMUX_PINGRP_SLXD, PMUX_FUNC_SDIO3);
  148. pinmux_set_func(PMUX_PINGRP_SLXK, PMUX_FUNC_SDIO3);
  149. pinmux_tristate_disable(PMUX_PINGRP_SLXA);
  150. pinmux_tristate_disable(PMUX_PINGRP_SLXC);
  151. pinmux_tristate_disable(PMUX_PINGRP_SLXD);
  152. pinmux_tristate_disable(PMUX_PINGRP_SLXK);
  153. /* fall through */
  154. case FUNCMUX_SDMMC3_SDB_4BIT:
  155. pinmux_set_func(PMUX_PINGRP_SDB, PMUX_FUNC_SDIO3);
  156. pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_SDIO3);
  157. pinmux_set_func(PMUX_PINGRP_SDD, PMUX_FUNC_SDIO3);
  158. pinmux_tristate_disable(PMUX_PINGRP_SDB);
  159. pinmux_tristate_disable(PMUX_PINGRP_SDC);
  160. pinmux_tristate_disable(PMUX_PINGRP_SDD);
  161. bad_config = 0;
  162. break;
  163. }
  164. break;
  165. case PERIPH_ID_SDMMC4:
  166. switch (config) {
  167. case FUNCMUX_SDMMC4_ATC_ATD_8BIT:
  168. pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_SDIO4);
  169. pinmux_set_func(PMUX_PINGRP_ATD, PMUX_FUNC_SDIO4);
  170. pinmux_tristate_disable(PMUX_PINGRP_ATC);
  171. pinmux_tristate_disable(PMUX_PINGRP_ATD);
  172. break;
  173. case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT:
  174. pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
  175. pinmux_tristate_disable(PMUX_PINGRP_GME);
  176. /* fall through */
  177. case FUNCMUX_SDMMC4_ATB_GMA_4_BIT:
  178. pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
  179. pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
  180. pinmux_tristate_disable(PMUX_PINGRP_ATB);
  181. pinmux_tristate_disable(PMUX_PINGRP_GMA);
  182. bad_config = 0;
  183. break;
  184. }
  185. break;
  186. case PERIPH_ID_KBC:
  187. if (config == FUNCMUX_DEFAULT) {
  188. enum pmux_pingrp grp[] = {PMUX_PINGRP_KBCA,
  189. PMUX_PINGRP_KBCB, PMUX_PINGRP_KBCC,
  190. PMUX_PINGRP_KBCD, PMUX_PINGRP_KBCE,
  191. PMUX_PINGRP_KBCF};
  192. int i;
  193. for (i = 0; i < ARRAY_SIZE(grp); i++) {
  194. pinmux_tristate_disable(grp[i]);
  195. pinmux_set_func(grp[i], PMUX_FUNC_KBC);
  196. pinmux_set_pullupdown(grp[i], PMUX_PULL_UP);
  197. }
  198. }
  199. break;
  200. case PERIPH_ID_USB2:
  201. if (config == FUNCMUX_USB2_ULPI) {
  202. pinmux_set_func(PMUX_PINGRP_UAA, PMUX_FUNC_ULPI);
  203. pinmux_set_func(PMUX_PINGRP_UAB, PMUX_FUNC_ULPI);
  204. pinmux_set_func(PMUX_PINGRP_UDA, PMUX_FUNC_ULPI);
  205. pinmux_tristate_disable(PMUX_PINGRP_UAA);
  206. pinmux_tristate_disable(PMUX_PINGRP_UAB);
  207. pinmux_tristate_disable(PMUX_PINGRP_UDA);
  208. }
  209. break;
  210. case PERIPH_ID_SPI1:
  211. if (config == FUNCMUX_SPI1_GMC_GMD) {
  212. pinmux_set_func(PMUX_PINGRP_GMC, PMUX_FUNC_SFLASH);
  213. pinmux_set_func(PMUX_PINGRP_GMD, PMUX_FUNC_SFLASH);
  214. pinmux_tristate_disable(PMUX_PINGRP_GMC);
  215. pinmux_tristate_disable(PMUX_PINGRP_GMD);
  216. }
  217. break;
  218. case PERIPH_ID_NDFLASH:
  219. switch (config) {
  220. case FUNCMUX_NDFLASH_ATC:
  221. pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_NAND);
  222. pinmux_tristate_disable(PMUX_PINGRP_ATC);
  223. break;
  224. case FUNCMUX_NDFLASH_KBC_8_BIT:
  225. pinmux_set_func(PMUX_PINGRP_KBCA, PMUX_FUNC_NAND);
  226. pinmux_set_func(PMUX_PINGRP_KBCB, PMUX_FUNC_NAND);
  227. pinmux_set_func(PMUX_PINGRP_KBCC, PMUX_FUNC_NAND);
  228. pinmux_set_func(PMUX_PINGRP_KBCD, PMUX_FUNC_NAND);
  229. pinmux_set_func(PMUX_PINGRP_KBCE, PMUX_FUNC_NAND);
  230. pinmux_set_func(PMUX_PINGRP_KBCF, PMUX_FUNC_NAND);
  231. pinmux_tristate_disable(PMUX_PINGRP_KBCA);
  232. pinmux_tristate_disable(PMUX_PINGRP_KBCB);
  233. pinmux_tristate_disable(PMUX_PINGRP_KBCC);
  234. pinmux_tristate_disable(PMUX_PINGRP_KBCD);
  235. pinmux_tristate_disable(PMUX_PINGRP_KBCE);
  236. pinmux_tristate_disable(PMUX_PINGRP_KBCF);
  237. bad_config = 0;
  238. break;
  239. }
  240. break;
  241. case PERIPH_ID_DISP1:
  242. if (config == FUNCMUX_DEFAULT) {
  243. int i;
  244. for (i = PMUX_PINGRP_LD0; i <= PMUX_PINGRP_LD17; i++) {
  245. pinmux_set_func(i, PMUX_FUNC_DISPA);
  246. pinmux_tristate_disable(i);
  247. pinmux_set_pullupdown(i, PMUX_PULL_NORMAL);
  248. }
  249. pinmux_config_pingrp_table(disp1_default,
  250. ARRAY_SIZE(disp1_default));
  251. }
  252. break;
  253. default:
  254. debug("%s: invalid periph_id %d", __func__, id);
  255. return -1;
  256. }
  257. if (bad_config) {
  258. debug("%s: invalid config %d for periph_id %d", __func__,
  259. config, id);
  260. return -1;
  261. }
  262. return 0;
  263. }