cpu_info.c 4.0 KB

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  1. /*
  2. * (C) Copyright 2007-2011
  3. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  4. * Tom Cubie <tangliang@allwinnertech.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <asm/io.h>
  10. #include <asm/arch/cpu.h>
  11. #include <asm/arch/clock.h>
  12. #include <axp_pmic.h>
  13. #include <errno.h>
  14. #ifdef CONFIG_MACH_SUN6I
  15. int sunxi_get_ss_bonding_id(void)
  16. {
  17. struct sunxi_ccm_reg * const ccm =
  18. (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
  19. static int bonding_id = -1;
  20. if (bonding_id != -1)
  21. return bonding_id;
  22. /* Enable Security System */
  23. setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_SS);
  24. setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_SS);
  25. bonding_id = readl(SUNXI_SS_BASE);
  26. bonding_id = (bonding_id >> 16) & 0x7;
  27. /* Disable Security System again */
  28. clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_SS);
  29. clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_SS);
  30. return bonding_id;
  31. }
  32. #endif
  33. #ifdef CONFIG_MACH_SUN8I
  34. uint sunxi_get_sram_id(void)
  35. {
  36. uint id;
  37. /* Unlock sram info reg, read it, relock */
  38. setbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15));
  39. id = readl(SUNXI_SRAMC_BASE + 0x24) >> 16;
  40. clrbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15));
  41. return id;
  42. }
  43. #endif
  44. #ifdef CONFIG_DISPLAY_CPUINFO
  45. int print_cpuinfo(void)
  46. {
  47. #ifdef CONFIG_MACH_SUN4I
  48. puts("CPU: Allwinner A10 (SUN4I)\n");
  49. #elif defined CONFIG_MACH_SUN5I
  50. u32 val = readl(SUNXI_SID_BASE + 0x08);
  51. switch ((val >> 12) & 0xf) {
  52. case 0: puts("CPU: Allwinner A12 (SUN5I)\n"); break;
  53. case 3: puts("CPU: Allwinner A13 (SUN5I)\n"); break;
  54. case 7: puts("CPU: Allwinner A10s (SUN5I)\n"); break;
  55. default: puts("CPU: Allwinner A1X (SUN5I)\n");
  56. }
  57. #elif defined CONFIG_MACH_SUN6I
  58. switch (sunxi_get_ss_bonding_id()) {
  59. case SUNXI_SS_BOND_ID_A31:
  60. puts("CPU: Allwinner A31 (SUN6I)\n");
  61. break;
  62. case SUNXI_SS_BOND_ID_A31S:
  63. puts("CPU: Allwinner A31s (SUN6I)\n");
  64. break;
  65. default:
  66. printf("CPU: Allwinner A31? (SUN6I, id: %d)\n",
  67. sunxi_get_ss_bonding_id());
  68. }
  69. #elif defined CONFIG_MACH_SUN7I
  70. puts("CPU: Allwinner A20 (SUN7I)\n");
  71. #elif defined CONFIG_MACH_SUN8I_A23
  72. printf("CPU: Allwinner A23 (SUN8I %04x)\n", sunxi_get_sram_id());
  73. #elif defined CONFIG_MACH_SUN8I_A33
  74. printf("CPU: Allwinner A33 (SUN8I %04x)\n", sunxi_get_sram_id());
  75. #elif defined CONFIG_MACH_SUN8I_A83T
  76. printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id());
  77. #elif defined CONFIG_MACH_SUN8I_H3
  78. printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
  79. #elif defined CONFIG_MACH_SUN9I
  80. puts("CPU: Allwinner A80 (SUN9I)\n");
  81. #elif defined CONFIG_MACH_SUN50I
  82. puts("CPU: Allwinner A64 (SUN50I)\n");
  83. #else
  84. #warning Please update cpu_info.c with correct CPU information
  85. puts("CPU: SUNXI Family\n");
  86. #endif
  87. return 0;
  88. }
  89. #endif
  90. #ifdef CONFIG_MACH_SUN8I_H3
  91. #define SIDC_PRCTL 0x40
  92. #define SIDC_RDKEY 0x60
  93. #define SIDC_OP_LOCK 0xAC
  94. uint32_t sun8i_efuse_read(uint32_t offset)
  95. {
  96. uint32_t reg_val;
  97. reg_val = readl(SUNXI_SIDC_BASE + SIDC_PRCTL);
  98. reg_val &= ~(((0x1ff) << 16) | 0x3);
  99. reg_val |= (offset << 16);
  100. writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
  101. reg_val &= ~(((0xff) << 8) | 0x3);
  102. reg_val |= (SIDC_OP_LOCK << 8) | 0x2;
  103. writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
  104. while (readl(SUNXI_SIDC_BASE + SIDC_PRCTL) & 0x2);
  105. reg_val &= ~(((0x1ff) << 16) | ((0xff) << 8) | 0x3);
  106. writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
  107. reg_val = readl(SUNXI_SIDC_BASE + SIDC_RDKEY);
  108. return reg_val;
  109. }
  110. #endif
  111. int sunxi_get_sid(unsigned int *sid)
  112. {
  113. #ifdef CONFIG_AXP221_POWER
  114. return axp_get_sid(sid);
  115. #elif defined CONFIG_MACH_SUN8I_H3
  116. /*
  117. * H3 SID controller has a bug, which makes the initial value of
  118. * SUNXI_SID_BASE at boot wrong.
  119. * Read the value directly from SID controller, in order to get
  120. * the correct value, and also refresh the wrong value at
  121. * SUNXI_SID_BASE.
  122. */
  123. int i;
  124. for (i = 0; i< 4; i++)
  125. sid[i] = sun8i_efuse_read(i * 4);
  126. return 0;
  127. #elif defined SUNXI_SID_BASE
  128. int i;
  129. for (i = 0; i< 4; i++)
  130. sid[i] = readl((ulong)SUNXI_SID_BASE + 4 * i);
  131. return 0;
  132. #else
  133. return -ENODEV;
  134. #endif
  135. }