audio.h 21 KB

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  1. /*
  2. * audio.h -- Audio Driver for Wolfson WM8350 PMIC
  3. *
  4. * Copyright 2007, 2008 Wolfson Microelectronics PLC
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. */
  12. #ifndef __LINUX_MFD_WM8350_AUDIO_H_
  13. #define __LINUX_MFD_WM8350_AUDIO_H_
  14. #include <linux/platform_device.h>
  15. #define WM8350_CLOCK_CONTROL_1 0x28
  16. #define WM8350_CLOCK_CONTROL_2 0x29
  17. #define WM8350_FLL_CONTROL_1 0x2A
  18. #define WM8350_FLL_CONTROL_2 0x2B
  19. #define WM8350_FLL_CONTROL_3 0x2C
  20. #define WM8350_FLL_CONTROL_4 0x2D
  21. #define WM8350_DAC_CONTROL 0x30
  22. #define WM8350_DAC_DIGITAL_VOLUME_L 0x32
  23. #define WM8350_DAC_DIGITAL_VOLUME_R 0x33
  24. #define WM8350_DAC_LR_RATE 0x35
  25. #define WM8350_DAC_CLOCK_CONTROL 0x36
  26. #define WM8350_DAC_MUTE 0x3A
  27. #define WM8350_DAC_MUTE_VOLUME 0x3B
  28. #define WM8350_DAC_SIDE 0x3C
  29. #define WM8350_ADC_CONTROL 0x40
  30. #define WM8350_ADC_DIGITAL_VOLUME_L 0x42
  31. #define WM8350_ADC_DIGITAL_VOLUME_R 0x43
  32. #define WM8350_ADC_DIVIDER 0x44
  33. #define WM8350_ADC_LR_RATE 0x46
  34. #define WM8350_INPUT_CONTROL 0x48
  35. #define WM8350_IN3_INPUT_CONTROL 0x49
  36. #define WM8350_MIC_BIAS_CONTROL 0x4A
  37. #define WM8350_OUTPUT_CONTROL 0x4C
  38. #define WM8350_JACK_DETECT 0x4D
  39. #define WM8350_ANTI_POP_CONTROL 0x4E
  40. #define WM8350_LEFT_INPUT_VOLUME 0x50
  41. #define WM8350_RIGHT_INPUT_VOLUME 0x51
  42. #define WM8350_LEFT_MIXER_CONTROL 0x58
  43. #define WM8350_RIGHT_MIXER_CONTROL 0x59
  44. #define WM8350_OUT3_MIXER_CONTROL 0x5C
  45. #define WM8350_OUT4_MIXER_CONTROL 0x5D
  46. #define WM8350_OUTPUT_LEFT_MIXER_VOLUME 0x60
  47. #define WM8350_OUTPUT_RIGHT_MIXER_VOLUME 0x61
  48. #define WM8350_INPUT_MIXER_VOLUME_L 0x62
  49. #define WM8350_INPUT_MIXER_VOLUME_R 0x63
  50. #define WM8350_INPUT_MIXER_VOLUME 0x64
  51. #define WM8350_LOUT1_VOLUME 0x68
  52. #define WM8350_ROUT1_VOLUME 0x69
  53. #define WM8350_LOUT2_VOLUME 0x6A
  54. #define WM8350_ROUT2_VOLUME 0x6B
  55. #define WM8350_BEEP_VOLUME 0x6F
  56. #define WM8350_AI_FORMATING 0x70
  57. #define WM8350_ADC_DAC_COMP 0x71
  58. #define WM8350_AI_ADC_CONTROL 0x72
  59. #define WM8350_AI_DAC_CONTROL 0x73
  60. #define WM8350_AIF_TEST 0x74
  61. #define WM8350_JACK_PIN_STATUS 0xE7
  62. /* Bit values for R08 (0x08) */
  63. #define WM8350_CODEC_ISEL_1_5 0 /* x1.5 */
  64. #define WM8350_CODEC_ISEL_1_0 1 /* x1.0 */
  65. #define WM8350_CODEC_ISEL_0_75 2 /* x0.75 */
  66. #define WM8350_CODEC_ISEL_0_5 3 /* x0.5 */
  67. #define WM8350_VMID_OFF 0
  68. #define WM8350_VMID_300K 1
  69. #define WM8350_VMID_50K 2
  70. #define WM8350_VMID_5K 3
  71. /*
  72. * R40 (0x28) - Clock Control 1
  73. */
  74. #define WM8350_TOCLK_RATE 0x4000
  75. #define WM8350_MCLK_SEL 0x0800
  76. #define WM8350_MCLK_DIV_MASK 0x0100
  77. #define WM8350_BCLK_DIV_MASK 0x00F0
  78. #define WM8350_OPCLK_DIV_MASK 0x0007
  79. /*
  80. * R41 (0x29) - Clock Control 2
  81. */
  82. #define WM8350_LRC_ADC_SEL 0x8000
  83. #define WM8350_MCLK_DIR 0x0001
  84. /*
  85. * R42 (0x2A) - FLL Control 1
  86. */
  87. #define WM8350_FLL_DITHER_WIDTH_MASK 0x3000
  88. #define WM8350_FLL_DITHER_HP 0x0800
  89. #define WM8350_FLL_OUTDIV_MASK 0x0700
  90. #define WM8350_FLL_RSP_RATE_MASK 0x00F0
  91. #define WM8350_FLL_RATE_MASK 0x0007
  92. /*
  93. * R43 (0x2B) - FLL Control 2
  94. */
  95. #define WM8350_FLL_RATIO_MASK 0xF800
  96. #define WM8350_FLL_N_MASK 0x03FF
  97. /*
  98. * R44 (0x2C) - FLL Control 3
  99. */
  100. #define WM8350_FLL_K_MASK 0xFFFF
  101. /*
  102. * R45 (0x2D) - FLL Control 4
  103. */
  104. #define WM8350_FLL_FRAC 0x0020
  105. #define WM8350_FLL_SLOW_LOCK_REF 0x0010
  106. #define WM8350_FLL_CLK_SRC_MASK 0x0003
  107. /*
  108. * R48 (0x30) - DAC Control
  109. */
  110. #define WM8350_DAC_MONO 0x2000
  111. #define WM8350_AIF_LRCLKRATE 0x1000
  112. #define WM8350_DEEMP_MASK 0x0030
  113. #define WM8350_DACL_DATINV 0x0002
  114. #define WM8350_DACR_DATINV 0x0001
  115. /*
  116. * R50 (0x32) - DAC Digital Volume L
  117. */
  118. #define WM8350_DAC_VU 0x0100
  119. #define WM8350_DACL_VOL_MASK 0x00FF
  120. /*
  121. * R51 (0x33) - DAC Digital Volume R
  122. */
  123. #define WM8350_DAC_VU 0x0100
  124. #define WM8350_DACR_VOL_MASK 0x00FF
  125. /*
  126. * R53 (0x35) - DAC LR Rate
  127. */
  128. #define WM8350_DACLRC_ENA 0x0800
  129. #define WM8350_DACLRC_RATE_MASK 0x07FF
  130. /*
  131. * R54 (0x36) - DAC Clock Control
  132. */
  133. #define WM8350_DACCLK_POL 0x0010
  134. #define WM8350_DAC_CLKDIV_MASK 0x0007
  135. /*
  136. * R58 (0x3A) - DAC Mute
  137. */
  138. #define WM8350_DAC_MUTE_ENA 0x4000
  139. /*
  140. * R59 (0x3B) - DAC Mute Volume
  141. */
  142. #define WM8350_DAC_MUTEMODE 0x4000
  143. #define WM8350_DAC_MUTERATE 0x2000
  144. #define WM8350_DAC_SB_FILT 0x1000
  145. /*
  146. * R60 (0x3C) - DAC Side
  147. */
  148. #define WM8350_ADC_TO_DACL_MASK 0x3000
  149. #define WM8350_ADC_TO_DACR_MASK 0x0C00
  150. /*
  151. * R64 (0x40) - ADC Control
  152. */
  153. #define WM8350_ADC_HPF_CUT_MASK 0x0300
  154. #define WM8350_ADCL_DATINV 0x0002
  155. #define WM8350_ADCR_DATINV 0x0001
  156. /*
  157. * R66 (0x42) - ADC Digital Volume L
  158. */
  159. #define WM8350_ADC_VU 0x0100
  160. #define WM8350_ADCL_VOL_MASK 0x00FF
  161. /*
  162. * R67 (0x43) - ADC Digital Volume R
  163. */
  164. #define WM8350_ADC_VU 0x0100
  165. #define WM8350_ADCR_VOL_MASK 0x00FF
  166. /*
  167. * R68 (0x44) - ADC Divider
  168. */
  169. #define WM8350_ADCL_DAC_SVOL_MASK 0x0F00
  170. #define WM8350_ADCR_DAC_SVOL_MASK 0x00F0
  171. #define WM8350_ADCCLK_POL 0x0008
  172. #define WM8350_ADC_CLKDIV_MASK 0x0007
  173. /*
  174. * R70 (0x46) - ADC LR Rate
  175. */
  176. #define WM8350_ADCLRC_ENA 0x0800
  177. #define WM8350_ADCLRC_RATE_MASK 0x07FF
  178. /*
  179. * R72 (0x48) - Input Control
  180. */
  181. #define WM8350_IN2R_ENA 0x0400
  182. #define WM8350_IN1RN_ENA 0x0200
  183. #define WM8350_IN1RP_ENA 0x0100
  184. #define WM8350_IN2L_ENA 0x0004
  185. #define WM8350_IN1LN_ENA 0x0002
  186. #define WM8350_IN1LP_ENA 0x0001
  187. /*
  188. * R73 (0x49) - IN3 Input Control
  189. */
  190. #define WM8350_IN3R_SHORT 0x4000
  191. #define WM8350_IN3L_SHORT 0x0040
  192. /*
  193. * R74 (0x4A) - Mic Bias Control
  194. */
  195. #define WM8350_MICBSEL 0x4000
  196. #define WM8350_MCDTHR_MASK 0x001C
  197. #define WM8350_MCDSCTHR_MASK 0x0003
  198. /*
  199. * R76 (0x4C) - Output Control
  200. */
  201. #define WM8350_OUT4_VROI 0x0800
  202. #define WM8350_OUT3_VROI 0x0400
  203. #define WM8350_OUT2_VROI 0x0200
  204. #define WM8350_OUT1_VROI 0x0100
  205. #define WM8350_OUT2_FB 0x0004
  206. #define WM8350_OUT1_FB 0x0001
  207. /*
  208. * R77 (0x4D) - Jack Detect
  209. */
  210. #define WM8350_JDL_ENA 0x8000
  211. #define WM8350_JDR_ENA 0x4000
  212. /*
  213. * R78 (0x4E) - Anti Pop Control
  214. */
  215. #define WM8350_ANTI_POP_MASK 0x0300
  216. #define WM8350_DIS_OP_LN4_MASK 0x00C0
  217. #define WM8350_DIS_OP_LN3_MASK 0x0030
  218. #define WM8350_DIS_OP_OUT2_MASK 0x000C
  219. #define WM8350_DIS_OP_OUT1_MASK 0x0003
  220. /*
  221. * R80 (0x50) - Left Input Volume
  222. */
  223. #define WM8350_INL_MUTE 0x4000
  224. #define WM8350_INL_ZC 0x2000
  225. #define WM8350_IN_VU 0x0100
  226. #define WM8350_INL_VOL_MASK 0x00FC
  227. /*
  228. * R81 (0x51) - Right Input Volume
  229. */
  230. #define WM8350_INR_MUTE 0x4000
  231. #define WM8350_INR_ZC 0x2000
  232. #define WM8350_IN_VU 0x0100
  233. #define WM8350_INR_VOL_MASK 0x00FC
  234. /*
  235. * R88 (0x58) - Left Mixer Control
  236. */
  237. #define WM8350_DACR_TO_MIXOUTL 0x1000
  238. #define WM8350_DACL_TO_MIXOUTL 0x0800
  239. #define WM8350_IN3L_TO_MIXOUTL 0x0004
  240. #define WM8350_INR_TO_MIXOUTL 0x0002
  241. #define WM8350_INL_TO_MIXOUTL 0x0001
  242. /*
  243. * R89 (0x59) - Right Mixer Control
  244. */
  245. #define WM8350_DACR_TO_MIXOUTR 0x1000
  246. #define WM8350_DACL_TO_MIXOUTR 0x0800
  247. #define WM8350_IN3R_TO_MIXOUTR 0x0008
  248. #define WM8350_INR_TO_MIXOUTR 0x0002
  249. #define WM8350_INL_TO_MIXOUTR 0x0001
  250. /*
  251. * R92 (0x5C) - OUT3 Mixer Control
  252. */
  253. #define WM8350_DACL_TO_OUT3 0x0800
  254. #define WM8350_MIXINL_TO_OUT3 0x0100
  255. #define WM8350_OUT4_TO_OUT3 0x0008
  256. #define WM8350_MIXOUTL_TO_OUT3 0x0001
  257. /*
  258. * R93 (0x5D) - OUT4 Mixer Control
  259. */
  260. #define WM8350_DACR_TO_OUT4 0x1000
  261. #define WM8350_DACL_TO_OUT4 0x0800
  262. #define WM8350_OUT4_ATTN 0x0400
  263. #define WM8350_MIXINR_TO_OUT4 0x0200
  264. #define WM8350_OUT3_TO_OUT4 0x0004
  265. #define WM8350_MIXOUTR_TO_OUT4 0x0002
  266. #define WM8350_MIXOUTL_TO_OUT4 0x0001
  267. /*
  268. * R96 (0x60) - Output Left Mixer Volume
  269. */
  270. #define WM8350_IN3L_MIXOUTL_VOL_MASK 0x0E00
  271. #define WM8350_IN3L_MIXOUTL_VOL_SHIFT 9
  272. #define WM8350_INR_MIXOUTL_VOL_MASK 0x00E0
  273. #define WM8350_INR_MIXOUTL_VOL_SHIFT 5
  274. #define WM8350_INL_MIXOUTL_VOL_MASK 0x000E
  275. #define WM8350_INL_MIXOUTL_VOL_SHIFT 1
  276. /* Bit values for R96 (0x60) */
  277. #define WM8350_IN3L_MIXOUTL_VOL_OFF 0
  278. #define WM8350_IN3L_MIXOUTL_VOL_M12DB 1
  279. #define WM8350_IN3L_MIXOUTL_VOL_M9DB 2
  280. #define WM8350_IN3L_MIXOUTL_VOL_M6DB 3
  281. #define WM8350_IN3L_MIXOUTL_VOL_M3DB 4
  282. #define WM8350_IN3L_MIXOUTL_VOL_0DB 5
  283. #define WM8350_IN3L_MIXOUTL_VOL_3DB 6
  284. #define WM8350_IN3L_MIXOUTL_VOL_6DB 7
  285. #define WM8350_INR_MIXOUTL_VOL_OFF 0
  286. #define WM8350_INR_MIXOUTL_VOL_M12DB 1
  287. #define WM8350_INR_MIXOUTL_VOL_M9DB 2
  288. #define WM8350_INR_MIXOUTL_VOL_M6DB 3
  289. #define WM8350_INR_MIXOUTL_VOL_M3DB 4
  290. #define WM8350_INR_MIXOUTL_VOL_0DB 5
  291. #define WM8350_INR_MIXOUTL_VOL_3DB 6
  292. #define WM8350_INR_MIXOUTL_VOL_6DB 7
  293. #define WM8350_INL_MIXOUTL_VOL_OFF 0
  294. #define WM8350_INL_MIXOUTL_VOL_M12DB 1
  295. #define WM8350_INL_MIXOUTL_VOL_M9DB 2
  296. #define WM8350_INL_MIXOUTL_VOL_M6DB 3
  297. #define WM8350_INL_MIXOUTL_VOL_M3DB 4
  298. #define WM8350_INL_MIXOUTL_VOL_0DB 5
  299. #define WM8350_INL_MIXOUTL_VOL_3DB 6
  300. #define WM8350_INL_MIXOUTL_VOL_6DB 7
  301. /*
  302. * R97 (0x61) - Output Right Mixer Volume
  303. */
  304. #define WM8350_IN3R_MIXOUTR_VOL_MASK 0xE000
  305. #define WM8350_IN3R_MIXOUTR_VOL_SHIFT 13
  306. #define WM8350_INR_MIXOUTR_VOL_MASK 0x00E0
  307. #define WM8350_INR_MIXOUTR_VOL_SHIFT 5
  308. #define WM8350_INL_MIXOUTR_VOL_MASK 0x000E
  309. #define WM8350_INL_MIXOUTR_VOL_SHIFT 1
  310. /* Bit values for R96 (0x60) */
  311. #define WM8350_IN3R_MIXOUTR_VOL_OFF 0
  312. #define WM8350_IN3R_MIXOUTR_VOL_M12DB 1
  313. #define WM8350_IN3R_MIXOUTR_VOL_M9DB 2
  314. #define WM8350_IN3R_MIXOUTR_VOL_M6DB 3
  315. #define WM8350_IN3R_MIXOUTR_VOL_M3DB 4
  316. #define WM8350_IN3R_MIXOUTR_VOL_0DB 5
  317. #define WM8350_IN3R_MIXOUTR_VOL_3DB 6
  318. #define WM8350_IN3R_MIXOUTR_VOL_6DB 7
  319. #define WM8350_INR_MIXOUTR_VOL_OFF 0
  320. #define WM8350_INR_MIXOUTR_VOL_M12DB 1
  321. #define WM8350_INR_MIXOUTR_VOL_M9DB 2
  322. #define WM8350_INR_MIXOUTR_VOL_M6DB 3
  323. #define WM8350_INR_MIXOUTR_VOL_M3DB 4
  324. #define WM8350_INR_MIXOUTR_VOL_0DB 5
  325. #define WM8350_INR_MIXOUTR_VOL_3DB 6
  326. #define WM8350_INR_MIXOUTR_VOL_6DB 7
  327. #define WM8350_INL_MIXOUTR_VOL_OFF 0
  328. #define WM8350_INL_MIXOUTR_VOL_M12DB 1
  329. #define WM8350_INL_MIXOUTR_VOL_M9DB 2
  330. #define WM8350_INL_MIXOUTR_VOL_M6DB 3
  331. #define WM8350_INL_MIXOUTR_VOL_M3DB 4
  332. #define WM8350_INL_MIXOUTR_VOL_0DB 5
  333. #define WM8350_INL_MIXOUTR_VOL_3DB 6
  334. #define WM8350_INL_MIXOUTR_VOL_6DB 7
  335. /*
  336. * R98 (0x62) - Input Mixer Volume L
  337. */
  338. #define WM8350_IN3L_MIXINL_VOL_MASK 0x0E00
  339. #define WM8350_IN2L_MIXINL_VOL_MASK 0x000E
  340. #define WM8350_INL_MIXINL_VOL 0x0001
  341. /*
  342. * R99 (0x63) - Input Mixer Volume R
  343. */
  344. #define WM8350_IN3R_MIXINR_VOL_MASK 0xE000
  345. #define WM8350_IN2R_MIXINR_VOL_MASK 0x00E0
  346. #define WM8350_INR_MIXINR_VOL 0x0001
  347. /*
  348. * R100 (0x64) - Input Mixer Volume
  349. */
  350. #define WM8350_OUT4_MIXIN_DST 0x8000
  351. #define WM8350_OUT4_MIXIN_VOL_MASK 0x000E
  352. /*
  353. * R104 (0x68) - LOUT1 Volume
  354. */
  355. #define WM8350_OUT1L_MUTE 0x4000
  356. #define WM8350_OUT1L_ZC 0x2000
  357. #define WM8350_OUT1_VU 0x0100
  358. #define WM8350_OUT1L_VOL_MASK 0x00FC
  359. #define WM8350_OUT1L_VOL_SHIFT 2
  360. /*
  361. * R105 (0x69) - ROUT1 Volume
  362. */
  363. #define WM8350_OUT1R_MUTE 0x4000
  364. #define WM8350_OUT1R_ZC 0x2000
  365. #define WM8350_OUT1_VU 0x0100
  366. #define WM8350_OUT1R_VOL_MASK 0x00FC
  367. #define WM8350_OUT1R_VOL_SHIFT 2
  368. /*
  369. * R106 (0x6A) - LOUT2 Volume
  370. */
  371. #define WM8350_OUT2L_MUTE 0x4000
  372. #define WM8350_OUT2L_ZC 0x2000
  373. #define WM8350_OUT2_VU 0x0100
  374. #define WM8350_OUT2L_VOL_MASK 0x00FC
  375. /*
  376. * R107 (0x6B) - ROUT2 Volume
  377. */
  378. #define WM8350_OUT2R_MUTE 0x4000
  379. #define WM8350_OUT2R_ZC 0x2000
  380. #define WM8350_OUT2R_INV 0x0400
  381. #define WM8350_OUT2R_INV_MUTE 0x0200
  382. #define WM8350_OUT2_VU 0x0100
  383. #define WM8350_OUT2R_VOL_MASK 0x00FC
  384. /*
  385. * R111 (0x6F) - BEEP Volume
  386. */
  387. #define WM8350_IN3R_OUT2R_VOL_MASK 0x00E0
  388. /*
  389. * R112 (0x70) - AI Formating
  390. */
  391. #define WM8350_AIF_BCLK_INV 0x8000
  392. #define WM8350_AIF_TRI 0x2000
  393. #define WM8350_AIF_LRCLK_INV 0x1000
  394. #define WM8350_AIF_WL_MASK 0x0C00
  395. #define WM8350_AIF_FMT_MASK 0x0300
  396. /*
  397. * R113 (0x71) - ADC DAC COMP
  398. */
  399. #define WM8350_DAC_COMP 0x0080
  400. #define WM8350_DAC_COMPMODE 0x0040
  401. #define WM8350_ADC_COMP 0x0020
  402. #define WM8350_ADC_COMPMODE 0x0010
  403. #define WM8350_LOOPBACK 0x0001
  404. /*
  405. * R114 (0x72) - AI ADC Control
  406. */
  407. #define WM8350_AIFADC_PD 0x0080
  408. #define WM8350_AIFADCL_SRC 0x0040
  409. #define WM8350_AIFADCR_SRC 0x0020
  410. #define WM8350_AIFADC_TDM_CHAN 0x0010
  411. #define WM8350_AIFADC_TDM 0x0008
  412. /*
  413. * R115 (0x73) - AI DAC Control
  414. */
  415. #define WM8350_BCLK_MSTR 0x4000
  416. #define WM8350_AIFDAC_PD 0x0080
  417. #define WM8350_DACL_SRC 0x0040
  418. #define WM8350_DACR_SRC 0x0020
  419. #define WM8350_AIFDAC_TDM_CHAN 0x0010
  420. #define WM8350_AIFDAC_TDM 0x0008
  421. #define WM8350_DAC_BOOST_MASK 0x0003
  422. /*
  423. * R116 (0x74) - AIF Test
  424. */
  425. #define WM8350_CODEC_BYP 0x4000
  426. #define WM8350_AIFADC_WR_TST 0x2000
  427. #define WM8350_AIFADC_RD_TST 0x1000
  428. #define WM8350_AIFDAC_WR_TST 0x0800
  429. #define WM8350_AIFDAC_RD_TST 0x0400
  430. #define WM8350_AIFADC_ASYN 0x0020
  431. #define WM8350_AIFDAC_ASYN 0x0010
  432. /*
  433. * R231 (0xE7) - Jack Status
  434. */
  435. #define WM8350_JACK_L_LVL 0x0800
  436. #define WM8350_JACK_R_LVL 0x0400
  437. #define WM8350_JACK_MICSCD_LVL 0x0200
  438. #define WM8350_JACK_MICSD_LVL 0x0100
  439. /*
  440. * WM8350 Platform setup
  441. */
  442. #define WM8350_S_CURVE_NONE 0x0
  443. #define WM8350_S_CURVE_FAST 0x1
  444. #define WM8350_S_CURVE_MEDIUM 0x2
  445. #define WM8350_S_CURVE_SLOW 0x3
  446. #define WM8350_DISCHARGE_OFF 0x0
  447. #define WM8350_DISCHARGE_FAST 0x1
  448. #define WM8350_DISCHARGE_MEDIUM 0x2
  449. #define WM8350_DISCHARGE_SLOW 0x3
  450. #define WM8350_TIE_OFF_500R 0x0
  451. #define WM8350_TIE_OFF_30K 0x1
  452. /*
  453. * Clock sources & directions
  454. */
  455. #define WM8350_SYSCLK 0
  456. #define WM8350_MCLK_SEL_PLL_MCLK 0
  457. #define WM8350_MCLK_SEL_PLL_DAC 1
  458. #define WM8350_MCLK_SEL_PLL_ADC 2
  459. #define WM8350_MCLK_SEL_PLL_32K 3
  460. #define WM8350_MCLK_SEL_MCLK 5
  461. /* clock divider id's */
  462. #define WM8350_ADC_CLKDIV 0
  463. #define WM8350_DAC_CLKDIV 1
  464. #define WM8350_BCLK_CLKDIV 2
  465. #define WM8350_OPCLK_CLKDIV 3
  466. #define WM8350_TO_CLKDIV 4
  467. #define WM8350_SYS_CLKDIV 5
  468. #define WM8350_DACLR_CLKDIV 6
  469. #define WM8350_ADCLR_CLKDIV 7
  470. /* ADC clock dividers */
  471. #define WM8350_ADCDIV_1 0x0
  472. #define WM8350_ADCDIV_1_5 0x1
  473. #define WM8350_ADCDIV_2 0x2
  474. #define WM8350_ADCDIV_3 0x3
  475. #define WM8350_ADCDIV_4 0x4
  476. #define WM8350_ADCDIV_5_5 0x5
  477. #define WM8350_ADCDIV_6 0x6
  478. /* ADC clock dividers */
  479. #define WM8350_DACDIV_1 0x0
  480. #define WM8350_DACDIV_1_5 0x1
  481. #define WM8350_DACDIV_2 0x2
  482. #define WM8350_DACDIV_3 0x3
  483. #define WM8350_DACDIV_4 0x4
  484. #define WM8350_DACDIV_5_5 0x5
  485. #define WM8350_DACDIV_6 0x6
  486. /* BCLK clock dividers */
  487. #define WM8350_BCLK_DIV_1 (0x0 << 4)
  488. #define WM8350_BCLK_DIV_1_5 (0x1 << 4)
  489. #define WM8350_BCLK_DIV_2 (0x2 << 4)
  490. #define WM8350_BCLK_DIV_3 (0x3 << 4)
  491. #define WM8350_BCLK_DIV_4 (0x4 << 4)
  492. #define WM8350_BCLK_DIV_5_5 (0x5 << 4)
  493. #define WM8350_BCLK_DIV_6 (0x6 << 4)
  494. #define WM8350_BCLK_DIV_8 (0x7 << 4)
  495. #define WM8350_BCLK_DIV_11 (0x8 << 4)
  496. #define WM8350_BCLK_DIV_12 (0x9 << 4)
  497. #define WM8350_BCLK_DIV_16 (0xa << 4)
  498. #define WM8350_BCLK_DIV_22 (0xb << 4)
  499. #define WM8350_BCLK_DIV_24 (0xc << 4)
  500. #define WM8350_BCLK_DIV_32 (0xd << 4)
  501. #define WM8350_BCLK_DIV_44 (0xe << 4)
  502. #define WM8350_BCLK_DIV_48 (0xf << 4)
  503. /* Sys (MCLK) clock dividers */
  504. #define WM8350_MCLK_DIV_1 (0x0 << 8)
  505. #define WM8350_MCLK_DIV_2 (0x1 << 8)
  506. /* OP clock dividers */
  507. #define WM8350_OPCLK_DIV_1 0x0
  508. #define WM8350_OPCLK_DIV_2 0x1
  509. #define WM8350_OPCLK_DIV_3 0x2
  510. #define WM8350_OPCLK_DIV_4 0x3
  511. #define WM8350_OPCLK_DIV_5_5 0x4
  512. #define WM8350_OPCLK_DIV_6 0x5
  513. /* DAI ID */
  514. #define WM8350_HIFI_DAI 0
  515. /*
  516. * Audio interrupts.
  517. */
  518. #define WM8350_IRQ_CODEC_JCK_DET_L 39
  519. #define WM8350_IRQ_CODEC_JCK_DET_R 40
  520. #define WM8350_IRQ_CODEC_MICSCD 41
  521. #define WM8350_IRQ_CODEC_MICD 42
  522. /*
  523. * WM8350 Platform data.
  524. *
  525. * This must be initialised per platform for best audio performance.
  526. * Please see WM8350 datasheet for information.
  527. */
  528. struct wm8350_audio_platform_data {
  529. int vmid_discharge_msecs; /* VMID --> OFF discharge time */
  530. int drain_msecs; /* OFF drain time */
  531. int cap_discharge_msecs; /* Cap ON (from OFF) discharge time */
  532. int vmid_charge_msecs; /* vmid power up time */
  533. u32 vmid_s_curve:2; /* vmid enable s curve speed */
  534. u32 dis_out4:2; /* out4 discharge speed */
  535. u32 dis_out3:2; /* out3 discharge speed */
  536. u32 dis_out2:2; /* out2 discharge speed */
  537. u32 dis_out1:2; /* out1 discharge speed */
  538. u32 vroi_out4:1; /* out4 tie off */
  539. u32 vroi_out3:1; /* out3 tie off */
  540. u32 vroi_out2:1; /* out2 tie off */
  541. u32 vroi_out1:1; /* out1 tie off */
  542. u32 vroi_enable:1; /* enable tie off */
  543. u32 codec_current_on:2; /* current level ON */
  544. u32 codec_current_standby:2; /* current level STANDBY */
  545. u32 codec_current_charge:2; /* codec current @ vmid charge */
  546. };
  547. struct snd_soc_codec;
  548. struct wm8350_codec {
  549. struct platform_device *pdev;
  550. struct snd_soc_codec *codec;
  551. struct wm8350_audio_platform_data *platform_data;
  552. };
  553. #endif