8250.h 6.3 KB

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  1. /*
  2. * Driver for 8250/16550-type serial ports
  3. *
  4. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  5. *
  6. * Copyright (C) 2001 Russell King.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/serial_8250.h>
  14. #include <linux/serial_reg.h>
  15. #include <linux/dmaengine.h>
  16. struct uart_8250_dma {
  17. int (*tx_dma)(struct uart_8250_port *p);
  18. int (*rx_dma)(struct uart_8250_port *p);
  19. /* Filter function */
  20. dma_filter_fn fn;
  21. /* Parameter to the filter function */
  22. void *rx_param;
  23. void *tx_param;
  24. struct dma_slave_config rxconf;
  25. struct dma_slave_config txconf;
  26. struct dma_chan *rxchan;
  27. struct dma_chan *txchan;
  28. /* Device address base for DMA operations */
  29. phys_addr_t rx_dma_addr;
  30. phys_addr_t tx_dma_addr;
  31. /* DMA address of the buffer in memory */
  32. dma_addr_t rx_addr;
  33. dma_addr_t tx_addr;
  34. dma_cookie_t rx_cookie;
  35. dma_cookie_t tx_cookie;
  36. void *rx_buf;
  37. size_t rx_size;
  38. size_t tx_size;
  39. unsigned char tx_running;
  40. unsigned char tx_err;
  41. unsigned char rx_running;
  42. };
  43. struct old_serial_port {
  44. unsigned int uart;
  45. unsigned int baud_base;
  46. unsigned int port;
  47. unsigned int irq;
  48. upf_t flags;
  49. unsigned char io_type;
  50. unsigned char __iomem *iomem_base;
  51. unsigned short iomem_reg_shift;
  52. };
  53. struct serial8250_config {
  54. const char *name;
  55. unsigned short fifo_size;
  56. unsigned short tx_loadsz;
  57. unsigned char fcr;
  58. unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
  59. unsigned int flags;
  60. };
  61. #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
  62. #define UART_CAP_EFR (1 << 9) /* UART has EFR */
  63. #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
  64. #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
  65. #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
  66. #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
  67. #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
  68. #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
  69. #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
  70. #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
  71. #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
  72. #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
  73. #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
  74. #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
  75. #define SERIAL8250_SHARE_IRQS 1
  76. #else
  77. #define SERIAL8250_SHARE_IRQS 0
  78. #endif
  79. #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
  80. { \
  81. .iobase = _base, \
  82. .irq = _irq, \
  83. .uartclk = 1843200, \
  84. .iotype = UPIO_PORT, \
  85. .flags = UPF_BOOT_AUTOCONF | (_flags), \
  86. }
  87. #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
  88. static inline int serial_in(struct uart_8250_port *up, int offset)
  89. {
  90. return up->port.serial_in(&up->port, offset);
  91. }
  92. static inline void serial_out(struct uart_8250_port *up, int offset, int value)
  93. {
  94. up->port.serial_out(&up->port, offset, value);
  95. }
  96. void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
  97. static inline int serial_dl_read(struct uart_8250_port *up)
  98. {
  99. return up->dl_read(up);
  100. }
  101. static inline void serial_dl_write(struct uart_8250_port *up, int value)
  102. {
  103. up->dl_write(up, value);
  104. }
  105. struct uart_8250_port *serial8250_get_port(int line);
  106. void serial8250_rpm_get(struct uart_8250_port *p);
  107. void serial8250_rpm_put(struct uart_8250_port *p);
  108. int serial8250_em485_init(struct uart_8250_port *p);
  109. void serial8250_em485_destroy(struct uart_8250_port *p);
  110. static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
  111. {
  112. serial_out(up, UART_MCR, value);
  113. }
  114. static inline int serial8250_in_MCR(struct uart_8250_port *up)
  115. {
  116. return serial_in(up, UART_MCR);
  117. }
  118. #if defined(__alpha__) && !defined(CONFIG_PCI)
  119. /*
  120. * Digital did something really horribly wrong with the OUT1 and OUT2
  121. * lines on at least some ALPHA's. The failure mode is that if either
  122. * is cleared, the machine locks up with endless interrupts.
  123. */
  124. #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
  125. #else
  126. #define ALPHA_KLUDGE_MCR 0
  127. #endif
  128. #ifdef CONFIG_SERIAL_8250_PNP
  129. int serial8250_pnp_init(void);
  130. void serial8250_pnp_exit(void);
  131. #else
  132. static inline int serial8250_pnp_init(void) { return 0; }
  133. static inline void serial8250_pnp_exit(void) { }
  134. #endif
  135. #ifdef CONFIG_SERIAL_8250_FINTEK
  136. int fintek_8250_probe(struct uart_8250_port *uart);
  137. #else
  138. static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
  139. #endif
  140. #ifdef CONFIG_ARCH_OMAP1
  141. static inline int is_omap1_8250(struct uart_8250_port *pt)
  142. {
  143. int res;
  144. switch (pt->port.mapbase) {
  145. case OMAP1_UART1_BASE:
  146. case OMAP1_UART2_BASE:
  147. case OMAP1_UART3_BASE:
  148. res = 1;
  149. break;
  150. default:
  151. res = 0;
  152. break;
  153. }
  154. return res;
  155. }
  156. static inline int is_omap1510_8250(struct uart_8250_port *pt)
  157. {
  158. if (!cpu_is_omap1510())
  159. return 0;
  160. return is_omap1_8250(pt);
  161. }
  162. #else
  163. static inline int is_omap1_8250(struct uart_8250_port *pt)
  164. {
  165. return 0;
  166. }
  167. static inline int is_omap1510_8250(struct uart_8250_port *pt)
  168. {
  169. return 0;
  170. }
  171. #endif
  172. #ifdef CONFIG_SERIAL_8250_DMA
  173. extern int serial8250_tx_dma(struct uart_8250_port *);
  174. extern int serial8250_rx_dma(struct uart_8250_port *);
  175. extern void serial8250_rx_dma_flush(struct uart_8250_port *);
  176. extern int serial8250_request_dma(struct uart_8250_port *);
  177. extern void serial8250_release_dma(struct uart_8250_port *);
  178. #else
  179. static inline int serial8250_tx_dma(struct uart_8250_port *p)
  180. {
  181. return -1;
  182. }
  183. static inline int serial8250_rx_dma(struct uart_8250_port *p)
  184. {
  185. return -1;
  186. }
  187. static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
  188. static inline int serial8250_request_dma(struct uart_8250_port *p)
  189. {
  190. return -1;
  191. }
  192. static inline void serial8250_release_dma(struct uart_8250_port *p) { }
  193. #endif
  194. static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
  195. {
  196. unsigned char status;
  197. status = serial_in(up, 0x04); /* EXCR2 */
  198. #define PRESL(x) ((x) & 0x30)
  199. if (PRESL(status) == 0x10) {
  200. /* already in high speed mode */
  201. return 0;
  202. } else {
  203. status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
  204. status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
  205. serial_out(up, 0x04, status);
  206. }
  207. return 1;
  208. }
  209. static inline int serial_index(struct uart_port *port)
  210. {
  211. return port->minor - 64;
  212. }