af9035.h 4.0 KB

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  1. /*
  2. * Afatech AF9035 DVB USB driver
  3. *
  4. * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
  5. * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20. */
  21. #ifndef AF9035_H
  22. #define AF9035_H
  23. #include "dvb_usb.h"
  24. #include "af9033.h"
  25. #include "tua9001.h"
  26. #include "fc0011.h"
  27. #include "fc0012.h"
  28. #include "mxl5007t.h"
  29. #include "tda18218.h"
  30. #include "fc2580.h"
  31. #include "it913x.h"
  32. #include "si2168.h"
  33. #include "si2157.h"
  34. struct reg_val {
  35. u32 reg;
  36. u8 val;
  37. };
  38. struct reg_val_mask {
  39. u32 reg;
  40. u8 val;
  41. u8 mask;
  42. };
  43. struct usb_req {
  44. u8 cmd;
  45. u8 mbox;
  46. u8 wlen;
  47. u8 *wbuf;
  48. u8 rlen;
  49. u8 *rbuf;
  50. };
  51. struct state {
  52. #define BUF_LEN 64
  53. u8 buf[BUF_LEN];
  54. u8 seq; /* packet sequence number */
  55. u8 prechip_version;
  56. u8 chip_version;
  57. u16 chip_type;
  58. u8 dual_mode:1;
  59. u8 no_read:1;
  60. u16 eeprom_addr;
  61. u8 af9033_i2c_addr[2];
  62. struct af9033_config af9033_config[2];
  63. struct af9033_ops ops;
  64. #define AF9035_I2C_CLIENT_MAX 4
  65. struct i2c_client *i2c_client[AF9035_I2C_CLIENT_MAX];
  66. struct i2c_adapter *i2c_adapter_demod;
  67. };
  68. static const u32 clock_lut_af9035[] = {
  69. 20480000, /* FPGA */
  70. 16384000, /* 16.38 MHz */
  71. 20480000, /* 20.48 MHz */
  72. 36000000, /* 36.00 MHz */
  73. 30000000, /* 30.00 MHz */
  74. 26000000, /* 26.00 MHz */
  75. 28000000, /* 28.00 MHz */
  76. 32000000, /* 32.00 MHz */
  77. 34000000, /* 34.00 MHz */
  78. 24000000, /* 24.00 MHz */
  79. 22000000, /* 22.00 MHz */
  80. 12000000, /* 12.00 MHz */
  81. };
  82. static const u32 clock_lut_it9135[] = {
  83. 12000000, /* 12.00 MHz */
  84. 20480000, /* 20.48 MHz */
  85. 36000000, /* 36.00 MHz */
  86. 30000000, /* 30.00 MHz */
  87. 26000000, /* 26.00 MHz */
  88. 28000000, /* 28.00 MHz */
  89. 32000000, /* 32.00 MHz */
  90. 34000000, /* 34.00 MHz */
  91. 24000000, /* 24.00 MHz */
  92. 22000000, /* 22.00 MHz */
  93. };
  94. #define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw"
  95. #define AF9035_FIRMWARE_IT9135_V1 "dvb-usb-it9135-01.fw"
  96. #define AF9035_FIRMWARE_IT9135_V2 "dvb-usb-it9135-02.fw"
  97. #define AF9035_FIRMWARE_IT9303 "dvb-usb-it9303-01.fw"
  98. /*
  99. * eeprom is memory mapped as read only. Writing that memory mapped address
  100. * will not corrupt eeprom.
  101. *
  102. * TS mode:
  103. * 0 TS
  104. * 1 DCA + PIP
  105. * 3 PIP
  106. * 5 DCA + PIP (AF9035 only)
  107. * n DCA
  108. *
  109. * Values 0, 3 and 5 are seen to this day. 0 for single TS and 3/5 for dual TS.
  110. */
  111. #define EEPROM_BASE_AF9035 0x42f5
  112. #define EEPROM_BASE_IT9135 0x4994
  113. #define EEPROM_SHIFT 0x10
  114. #define EEPROM_IR_MODE 0x18
  115. #define EEPROM_TS_MODE 0x31
  116. #define EEPROM_2ND_DEMOD_ADDR 0x32
  117. #define EEPROM_IR_TYPE 0x34
  118. #define EEPROM_1_IF_L 0x38
  119. #define EEPROM_1_IF_H 0x39
  120. #define EEPROM_1_TUNER_ID 0x3c
  121. #define EEPROM_2_IF_L 0x48
  122. #define EEPROM_2_IF_H 0x49
  123. #define EEPROM_2_TUNER_ID 0x4c
  124. /* USB commands */
  125. #define CMD_MEM_RD 0x00
  126. #define CMD_MEM_WR 0x01
  127. #define CMD_I2C_RD 0x02
  128. #define CMD_I2C_WR 0x03
  129. #define CMD_IR_GET 0x18
  130. #define CMD_FW_DL 0x21
  131. #define CMD_FW_QUERYINFO 0x22
  132. #define CMD_FW_BOOT 0x23
  133. #define CMD_FW_DL_BEGIN 0x24
  134. #define CMD_FW_DL_END 0x25
  135. #define CMD_FW_SCATTER_WR 0x29
  136. #define CMD_GENERIC_I2C_RD 0x2a
  137. #define CMD_GENERIC_I2C_WR 0x2b
  138. #endif