solo6x10.h 9.8 KB

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  1. /*
  2. * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
  3. *
  4. * Original author:
  5. * Ben Collins <bcollins@ubuntu.com>
  6. *
  7. * Additional work by:
  8. * John Brooks <john.brooks@bluecherry.net>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. */
  20. #ifndef __SOLO6X10_H
  21. #define __SOLO6X10_H
  22. #include <linux/pci.h>
  23. #include <linux/i2c.h>
  24. #include <linux/mutex.h>
  25. #include <linux/list.h>
  26. #include <linux/wait.h>
  27. #include <linux/stringify.h>
  28. #include <linux/io.h>
  29. #include <linux/atomic.h>
  30. #include <linux/slab.h>
  31. #include <linux/videodev2.h>
  32. #include <media/v4l2-dev.h>
  33. #include <media/v4l2-device.h>
  34. #include <media/v4l2-ctrls.h>
  35. #include <media/videobuf2-v4l2.h>
  36. #include "solo6x10-regs.h"
  37. #ifndef PCI_VENDOR_ID_SOFTLOGIC
  38. #define PCI_VENDOR_ID_SOFTLOGIC 0x9413
  39. #define PCI_DEVICE_ID_SOLO6010 0x6010
  40. #define PCI_DEVICE_ID_SOLO6110 0x6110
  41. #endif
  42. #ifndef PCI_VENDOR_ID_BLUECHERRY
  43. #define PCI_VENDOR_ID_BLUECHERRY 0x1BB3
  44. /* Neugent Softlogic 6010 based cards */
  45. #define PCI_DEVICE_ID_NEUSOLO_4 0x4304
  46. #define PCI_DEVICE_ID_NEUSOLO_9 0x4309
  47. #define PCI_DEVICE_ID_NEUSOLO_16 0x4310
  48. /* Bluecherry Softlogic 6010 based cards */
  49. #define PCI_DEVICE_ID_BC_SOLO_4 0x4E04
  50. #define PCI_DEVICE_ID_BC_SOLO_9 0x4E09
  51. #define PCI_DEVICE_ID_BC_SOLO_16 0x4E10
  52. /* Bluecherry Softlogic 6110 based cards */
  53. #define PCI_DEVICE_ID_BC_6110_4 0x5304
  54. #define PCI_DEVICE_ID_BC_6110_8 0x5308
  55. #define PCI_DEVICE_ID_BC_6110_16 0x5310
  56. #endif /* Bluecherry */
  57. /* Used in pci_device_id, and solo_dev->type */
  58. #define SOLO_DEV_6010 0
  59. #define SOLO_DEV_6110 1
  60. #define SOLO6X10_NAME "solo6x10"
  61. #define SOLO_MAX_CHANNELS 16
  62. #define SOLO6X10_VERSION "3.0.0"
  63. /*
  64. * The SOLO6x10 actually has 8 i2c channels, but we only use 2.
  65. * 0 - Techwell chip(s)
  66. * 1 - SAA7128
  67. */
  68. #define SOLO_I2C_ADAPTERS 2
  69. #define SOLO_I2C_TW 0
  70. #define SOLO_I2C_SAA 1
  71. /* DMA Engine setup */
  72. #define SOLO_NR_P2M 4
  73. #define SOLO_NR_P2M_DESC 256
  74. #define SOLO_P2M_DESC_SIZE (SOLO_NR_P2M_DESC * 16)
  75. /* Encoder standard modes */
  76. #define SOLO_ENC_MODE_CIF 2
  77. #define SOLO_ENC_MODE_HD1 1
  78. #define SOLO_ENC_MODE_D1 9
  79. #define SOLO_DEFAULT_QP 3
  80. #define SOLO_CID_CUSTOM_BASE (V4L2_CID_USER_BASE | 0xf000)
  81. #define V4L2_CID_MOTION_TRACE (SOLO_CID_CUSTOM_BASE+2)
  82. #define V4L2_CID_OSD_TEXT (SOLO_CID_CUSTOM_BASE+3)
  83. /*
  84. * Motion thresholds are in a table of 64x64 samples, with
  85. * each sample representing 16x16 pixels of the source. In
  86. * effect, 44x30 samples are used for NTSC, and 44x36 for PAL.
  87. * The 5th sample on the 10th row is (10*64)+5 = 645.
  88. *
  89. * Internally it is stored as a 45x45 array (45*16 = 720, which is the
  90. * maximum PAL/NTSC width).
  91. */
  92. #define SOLO_MOTION_SZ (45)
  93. enum SOLO_I2C_STATE {
  94. IIC_STATE_IDLE,
  95. IIC_STATE_START,
  96. IIC_STATE_READ,
  97. IIC_STATE_WRITE,
  98. IIC_STATE_STOP
  99. };
  100. /* Defined in Table 4-16, Page 68-69 of the 6010 Datasheet */
  101. struct solo_p2m_desc {
  102. u32 ctrl;
  103. u32 cfg;
  104. u32 dma_addr;
  105. u32 ext_addr;
  106. };
  107. struct solo_p2m_dev {
  108. struct mutex mutex;
  109. struct completion completion;
  110. int desc_count;
  111. int desc_idx;
  112. struct solo_p2m_desc *descs;
  113. int error;
  114. };
  115. #define OSD_TEXT_MAX 44
  116. struct solo_vb2_buf {
  117. struct vb2_v4l2_buffer vb;
  118. struct list_head list;
  119. };
  120. enum solo_enc_types {
  121. SOLO_ENC_TYPE_STD,
  122. SOLO_ENC_TYPE_EXT,
  123. };
  124. struct solo_enc_dev {
  125. struct solo_dev *solo_dev;
  126. /* V4L2 Items */
  127. struct v4l2_ctrl_handler hdl;
  128. struct v4l2_ctrl *md_thresholds;
  129. struct video_device *vfd;
  130. /* General accounting */
  131. struct mutex lock;
  132. spinlock_t motion_lock;
  133. u8 ch;
  134. u8 mode, gop, qp, interlaced, interval;
  135. u8 bw_weight;
  136. u16 motion_thresh;
  137. bool motion_global;
  138. bool motion_enabled;
  139. u16 width;
  140. u16 height;
  141. /* OSD buffers */
  142. char osd_text[OSD_TEXT_MAX + 1];
  143. u8 osd_buf[SOLO_EOSD_EXT_SIZE_MAX]
  144. __aligned(4);
  145. /* VOP stuff */
  146. u8 vop[64];
  147. int vop_len;
  148. u8 jpeg_header[1024];
  149. int jpeg_len;
  150. u32 fmt;
  151. enum solo_enc_types type;
  152. u32 sequence;
  153. struct vb2_queue vidq;
  154. struct list_head vidq_active;
  155. int desc_count;
  156. int desc_nelts;
  157. struct solo_p2m_desc *desc_items;
  158. dma_addr_t desc_dma;
  159. spinlock_t av_lock;
  160. };
  161. /* The SOLO6x10 PCI Device */
  162. struct solo_dev {
  163. /* General stuff */
  164. struct pci_dev *pdev;
  165. int type;
  166. unsigned int time_sync;
  167. unsigned int usec_lsb;
  168. unsigned int clock_mhz;
  169. u8 __iomem *reg_base;
  170. int nr_chans;
  171. int nr_ext;
  172. u32 irq_mask;
  173. u32 motion_mask;
  174. struct v4l2_device v4l2_dev;
  175. /* tw28xx accounting */
  176. u8 tw2865, tw2864, tw2815;
  177. u8 tw28_cnt;
  178. /* i2c related items */
  179. struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS];
  180. enum SOLO_I2C_STATE i2c_state;
  181. struct mutex i2c_mutex;
  182. int i2c_id;
  183. wait_queue_head_t i2c_wait;
  184. struct i2c_msg *i2c_msg;
  185. unsigned int i2c_msg_num;
  186. unsigned int i2c_msg_ptr;
  187. /* P2M DMA Engine */
  188. struct solo_p2m_dev p2m_dev[SOLO_NR_P2M];
  189. atomic_t p2m_count;
  190. int p2m_jiffies;
  191. unsigned int p2m_timeouts;
  192. /* V4L2 Display items */
  193. struct video_device *vfd;
  194. unsigned int erasing;
  195. unsigned int frame_blank;
  196. u8 cur_disp_ch;
  197. wait_queue_head_t disp_thread_wait;
  198. struct v4l2_ctrl_handler disp_hdl;
  199. /* V4L2 Encoder items */
  200. struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS];
  201. u16 enc_bw_remain;
  202. /* IDX into hw mp4 encoder */
  203. u8 enc_idx;
  204. /* Current video settings */
  205. u32 video_type;
  206. u16 video_hsize, video_vsize;
  207. u16 vout_hstart, vout_vstart;
  208. u16 vin_hstart, vin_vstart;
  209. u8 fps;
  210. /* JPEG Qp setting */
  211. spinlock_t jpeg_qp_lock;
  212. u32 jpeg_qp[2];
  213. /* Audio components */
  214. struct snd_card *snd_card;
  215. struct snd_pcm *snd_pcm;
  216. atomic_t snd_users;
  217. int g723_hw_idx;
  218. /* sysfs stuffs */
  219. struct device dev;
  220. int sdram_size;
  221. struct bin_attribute sdram_attr;
  222. unsigned int sys_config;
  223. /* Ring thread */
  224. struct task_struct *ring_thread;
  225. wait_queue_head_t ring_thread_wait;
  226. /* VOP_HEADER handling */
  227. void *vh_buf;
  228. dma_addr_t vh_dma;
  229. int vh_size;
  230. /* Buffer handling */
  231. struct vb2_queue vidq;
  232. u32 sequence;
  233. struct task_struct *kthread;
  234. struct mutex lock;
  235. spinlock_t slock;
  236. int old_write;
  237. struct list_head vidq_active;
  238. };
  239. static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
  240. {
  241. return readl(solo_dev->reg_base + reg);
  242. }
  243. static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
  244. u32 data)
  245. {
  246. u16 val;
  247. writel(data, solo_dev->reg_base + reg);
  248. pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
  249. }
  250. static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
  251. {
  252. dev->irq_mask |= mask;
  253. solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
  254. }
  255. static inline void solo_irq_off(struct solo_dev *dev, u32 mask)
  256. {
  257. dev->irq_mask &= ~mask;
  258. solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
  259. }
  260. /* Init/exit routines for subsystems */
  261. int solo_disp_init(struct solo_dev *solo_dev);
  262. void solo_disp_exit(struct solo_dev *solo_dev);
  263. int solo_gpio_init(struct solo_dev *solo_dev);
  264. void solo_gpio_exit(struct solo_dev *solo_dev);
  265. int solo_i2c_init(struct solo_dev *solo_dev);
  266. void solo_i2c_exit(struct solo_dev *solo_dev);
  267. int solo_p2m_init(struct solo_dev *solo_dev);
  268. void solo_p2m_exit(struct solo_dev *solo_dev);
  269. int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
  270. void solo_v4l2_exit(struct solo_dev *solo_dev);
  271. int solo_enc_init(struct solo_dev *solo_dev);
  272. void solo_enc_exit(struct solo_dev *solo_dev);
  273. int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
  274. void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
  275. int solo_g723_init(struct solo_dev *solo_dev);
  276. void solo_g723_exit(struct solo_dev *solo_dev);
  277. /* ISR's */
  278. int solo_i2c_isr(struct solo_dev *solo_dev);
  279. void solo_p2m_isr(struct solo_dev *solo_dev, int id);
  280. void solo_p2m_error_isr(struct solo_dev *solo_dev);
  281. void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
  282. void solo_g723_isr(struct solo_dev *solo_dev);
  283. void solo_motion_isr(struct solo_dev *solo_dev);
  284. void solo_video_in_isr(struct solo_dev *solo_dev);
  285. /* i2c read/write */
  286. u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
  287. void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
  288. u8 data);
  289. /* P2M DMA */
  290. int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
  291. dma_addr_t dma_addr, u32 ext_addr, u32 size,
  292. int repeat, u32 ext_size);
  293. int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
  294. void *sys_addr, u32 ext_addr, u32 size,
  295. int repeat, u32 ext_size);
  296. void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
  297. dma_addr_t dma_addr, u32 ext_addr, u32 size,
  298. int repeat, u32 ext_size);
  299. int solo_p2m_dma_desc(struct solo_dev *solo_dev,
  300. struct solo_p2m_desc *desc, dma_addr_t desc_dma,
  301. int desc_cnt);
  302. /* Global s_std ioctl */
  303. int solo_set_video_type(struct solo_dev *solo_dev, bool is_50hz);
  304. void solo_update_mode(struct solo_enc_dev *solo_enc);
  305. /* Set the threshold for motion detection */
  306. int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
  307. int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
  308. const u16 *thresholds);
  309. #define SOLO_DEF_MOT_THRESH 0x0300
  310. /* Write text on OSD */
  311. int solo_osd_print(struct solo_enc_dev *solo_enc);
  312. /* EEPROM commands */
  313. unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
  314. __be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc);
  315. int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
  316. __be16 data);
  317. /* JPEG Qp functions */
  318. void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
  319. unsigned int qp);
  320. int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch);
  321. #define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags))
  322. #endif /* __SOLO6X10_H */