cx18-streams.c 29 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. .unlocked_ioctl = video_ioctl2,
  41. .release = cx18_v4l2_close,
  42. .poll = cx18_v4l2_enc_poll,
  43. .mmap = cx18_v4l2_mmap,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. u32 caps;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE,
  62. V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  63. V4L2_CAP_AUDIO | V4L2_CAP_TUNER
  64. },
  65. { /* CX18_ENC_STREAM_TYPE_TS */
  66. "TS",
  67. VFL_TYPE_GRABBER, -1,
  68. PCI_DMA_FROMDEVICE,
  69. },
  70. { /* CX18_ENC_STREAM_TYPE_YUV */
  71. "encoder YUV",
  72. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  73. PCI_DMA_FROMDEVICE,
  74. V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  75. V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER
  76. },
  77. { /* CX18_ENC_STREAM_TYPE_VBI */
  78. "encoder VBI",
  79. VFL_TYPE_VBI, 0,
  80. PCI_DMA_FROMDEVICE,
  81. V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE |
  82. V4L2_CAP_READWRITE | V4L2_CAP_TUNER
  83. },
  84. { /* CX18_ENC_STREAM_TYPE_PCM */
  85. "encoder PCM audio",
  86. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  87. PCI_DMA_FROMDEVICE,
  88. V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
  89. },
  90. { /* CX18_ENC_STREAM_TYPE_IDX */
  91. "encoder IDX",
  92. VFL_TYPE_GRABBER, -1,
  93. PCI_DMA_FROMDEVICE,
  94. },
  95. { /* CX18_ENC_STREAM_TYPE_RAD */
  96. "encoder radio",
  97. VFL_TYPE_RADIO, 0,
  98. PCI_DMA_NONE,
  99. V4L2_CAP_RADIO | V4L2_CAP_TUNER
  100. },
  101. };
  102. static void cx18_dma_free(struct videobuf_queue *q,
  103. struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
  104. {
  105. videobuf_waiton(q, &buf->vb, 0, 0);
  106. videobuf_vmalloc_free(&buf->vb);
  107. buf->vb.state = VIDEOBUF_NEEDS_INIT;
  108. }
  109. static int cx18_prepare_buffer(struct videobuf_queue *q,
  110. struct cx18_stream *s,
  111. struct cx18_videobuf_buffer *buf,
  112. u32 pixelformat,
  113. unsigned int width, unsigned int height,
  114. enum v4l2_field field)
  115. {
  116. struct cx18 *cx = s->cx;
  117. int rc = 0;
  118. /* check settings */
  119. buf->bytes_used = 0;
  120. if ((width < 48) || (height < 32))
  121. return -EINVAL;
  122. buf->vb.size = (width * height * 2);
  123. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  124. return -EINVAL;
  125. /* alloc + fill struct (if changed) */
  126. if (buf->vb.width != width || buf->vb.height != height ||
  127. buf->vb.field != field || s->pixelformat != pixelformat ||
  128. buf->tvnorm != cx->std) {
  129. buf->vb.width = width;
  130. buf->vb.height = height;
  131. buf->vb.field = field;
  132. buf->tvnorm = cx->std;
  133. s->pixelformat = pixelformat;
  134. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  135. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  136. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  137. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  138. else
  139. s->vb_bytes_per_frame = height * 720 * 2;
  140. cx18_dma_free(q, s, buf);
  141. }
  142. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  143. return -EINVAL;
  144. if (buf->vb.field == 0)
  145. buf->vb.field = V4L2_FIELD_INTERLACED;
  146. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  147. buf->vb.width = width;
  148. buf->vb.height = height;
  149. buf->vb.field = field;
  150. buf->tvnorm = cx->std;
  151. s->pixelformat = pixelformat;
  152. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  153. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  154. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  155. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  156. else
  157. s->vb_bytes_per_frame = height * 720 * 2;
  158. rc = videobuf_iolock(q, &buf->vb, NULL);
  159. if (rc != 0)
  160. goto fail;
  161. }
  162. buf->vb.state = VIDEOBUF_PREPARED;
  163. return 0;
  164. fail:
  165. cx18_dma_free(q, s, buf);
  166. return rc;
  167. }
  168. /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
  169. 1440 is a single line of 4:2:2 YUV at 720 luma samples wide
  170. */
  171. #define VB_MIN_BUFFERS 32
  172. #define VB_MIN_BUFSIZE 4147200
  173. static int buffer_setup(struct videobuf_queue *q,
  174. unsigned int *count, unsigned int *size)
  175. {
  176. struct cx18_stream *s = q->priv_data;
  177. struct cx18 *cx = s->cx;
  178. *size = 2 * cx->cxhdl.width * cx->cxhdl.height;
  179. if (*count == 0)
  180. *count = VB_MIN_BUFFERS;
  181. while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
  182. (*count)--;
  183. q->field = V4L2_FIELD_INTERLACED;
  184. q->last = V4L2_FIELD_INTERLACED;
  185. return 0;
  186. }
  187. static int buffer_prepare(struct videobuf_queue *q,
  188. struct videobuf_buffer *vb,
  189. enum v4l2_field field)
  190. {
  191. struct cx18_videobuf_buffer *buf =
  192. container_of(vb, struct cx18_videobuf_buffer, vb);
  193. struct cx18_stream *s = q->priv_data;
  194. struct cx18 *cx = s->cx;
  195. return cx18_prepare_buffer(q, s, buf, s->pixelformat,
  196. cx->cxhdl.width, cx->cxhdl.height, field);
  197. }
  198. static void buffer_release(struct videobuf_queue *q,
  199. struct videobuf_buffer *vb)
  200. {
  201. struct cx18_videobuf_buffer *buf =
  202. container_of(vb, struct cx18_videobuf_buffer, vb);
  203. struct cx18_stream *s = q->priv_data;
  204. cx18_dma_free(q, s, buf);
  205. }
  206. static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  207. {
  208. struct cx18_videobuf_buffer *buf =
  209. container_of(vb, struct cx18_videobuf_buffer, vb);
  210. struct cx18_stream *s = q->priv_data;
  211. buf->vb.state = VIDEOBUF_QUEUED;
  212. list_add_tail(&buf->vb.queue, &s->vb_capture);
  213. }
  214. static struct videobuf_queue_ops cx18_videobuf_qops = {
  215. .buf_setup = buffer_setup,
  216. .buf_prepare = buffer_prepare,
  217. .buf_queue = buffer_queue,
  218. .buf_release = buffer_release,
  219. };
  220. static void cx18_stream_init(struct cx18 *cx, int type)
  221. {
  222. struct cx18_stream *s = &cx->streams[type];
  223. memset(s, 0, sizeof(*s));
  224. /* initialize cx18_stream fields */
  225. s->dvb = NULL;
  226. s->cx = cx;
  227. s->type = type;
  228. s->name = cx18_stream_info[type].name;
  229. s->handle = CX18_INVALID_TASK_HANDLE;
  230. s->dma = cx18_stream_info[type].dma;
  231. s->v4l2_dev_caps = cx18_stream_info[type].caps;
  232. s->buffers = cx->stream_buffers[type];
  233. s->buf_size = cx->stream_buf_size[type];
  234. INIT_LIST_HEAD(&s->buf_pool);
  235. s->bufs_per_mdl = 1;
  236. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  237. init_waitqueue_head(&s->waitq);
  238. s->id = -1;
  239. spin_lock_init(&s->q_free.lock);
  240. cx18_queue_init(&s->q_free);
  241. spin_lock_init(&s->q_busy.lock);
  242. cx18_queue_init(&s->q_busy);
  243. spin_lock_init(&s->q_full.lock);
  244. cx18_queue_init(&s->q_full);
  245. spin_lock_init(&s->q_idle.lock);
  246. cx18_queue_init(&s->q_idle);
  247. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  248. INIT_LIST_HEAD(&s->vb_capture);
  249. s->vb_timeout.function = cx18_vb_timeout;
  250. s->vb_timeout.data = (unsigned long)s;
  251. init_timer(&s->vb_timeout);
  252. spin_lock_init(&s->vb_lock);
  253. if (type == CX18_ENC_STREAM_TYPE_YUV) {
  254. spin_lock_init(&s->vbuf_q_lock);
  255. s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  256. videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
  257. &cx->pci_dev->dev, &s->vbuf_q_lock,
  258. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  259. V4L2_FIELD_INTERLACED,
  260. sizeof(struct cx18_videobuf_buffer),
  261. s, &cx->serialize_lock);
  262. /* Assume the previous pixel default */
  263. s->pixelformat = V4L2_PIX_FMT_HM12;
  264. s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
  265. s->vb_bytes_per_line = 720;
  266. }
  267. }
  268. static int cx18_prep_dev(struct cx18 *cx, int type)
  269. {
  270. struct cx18_stream *s = &cx->streams[type];
  271. u32 cap = cx->v4l2_cap;
  272. int num_offset = cx18_stream_info[type].num_offset;
  273. int num = cx->instance + cx18_first_minor + num_offset;
  274. /*
  275. * These five fields are always initialized.
  276. * For analog capture related streams, if video_dev.v4l2_dev == NULL then the
  277. * stream is not in use.
  278. * For the TS stream, if dvb == NULL then the stream is not in use.
  279. * In those cases no other fields but these four can be used.
  280. */
  281. s->video_dev.v4l2_dev = NULL;
  282. s->dvb = NULL;
  283. s->cx = cx;
  284. s->type = type;
  285. s->name = cx18_stream_info[type].name;
  286. /* Check whether the radio is supported */
  287. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  288. return 0;
  289. /* Check whether VBI is supported */
  290. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  291. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  292. return 0;
  293. /* User explicitly selected 0 buffers for these streams, so don't
  294. create them. */
  295. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  296. cx->stream_buffers[type] == 0) {
  297. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  298. return 0;
  299. }
  300. cx18_stream_init(cx, type);
  301. /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
  302. if (type == CX18_ENC_STREAM_TYPE_TS) {
  303. if (cx->card->hw_all & CX18_HW_DVB) {
  304. s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
  305. if (s->dvb == NULL) {
  306. CX18_ERR("Couldn't allocate cx18_dvb structure"
  307. " for %s\n", s->name);
  308. return -ENOMEM;
  309. }
  310. } else {
  311. /* Don't need buffers for the TS, if there is no DVB */
  312. s->buffers = 0;
  313. }
  314. }
  315. if (num_offset == -1)
  316. return 0;
  317. /* initialize the v4l2 video device structure */
  318. snprintf(s->video_dev.name, sizeof(s->video_dev.name), "%s %s",
  319. cx->v4l2_dev.name, s->name);
  320. s->video_dev.num = num;
  321. s->video_dev.v4l2_dev = &cx->v4l2_dev;
  322. s->video_dev.fops = &cx18_v4l2_enc_fops;
  323. s->video_dev.release = video_device_release_empty;
  324. if (cx->card->video_inputs->video_type == CX18_CARD_INPUT_VID_TUNER)
  325. s->video_dev.tvnorms = cx->tuner_std;
  326. else
  327. s->video_dev.tvnorms = V4L2_STD_ALL;
  328. s->video_dev.lock = &cx->serialize_lock;
  329. cx18_set_funcs(&s->video_dev);
  330. return 0;
  331. }
  332. /* Initialize v4l2 variables and register v4l2 devices */
  333. int cx18_streams_setup(struct cx18 *cx)
  334. {
  335. int type, ret;
  336. /* Setup V4L2 Devices */
  337. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  338. /* Prepare device */
  339. ret = cx18_prep_dev(cx, type);
  340. if (ret < 0)
  341. break;
  342. /* Allocate Stream */
  343. ret = cx18_stream_alloc(&cx->streams[type]);
  344. if (ret < 0)
  345. break;
  346. }
  347. if (type == CX18_MAX_STREAMS)
  348. return 0;
  349. /* One or more streams could not be initialized. Clean 'em all up. */
  350. cx18_streams_cleanup(cx, 0);
  351. return ret;
  352. }
  353. static int cx18_reg_dev(struct cx18 *cx, int type)
  354. {
  355. struct cx18_stream *s = &cx->streams[type];
  356. int vfl_type = cx18_stream_info[type].vfl_type;
  357. const char *name;
  358. int num, ret;
  359. if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
  360. ret = cx18_dvb_register(s);
  361. if (ret < 0) {
  362. CX18_ERR("DVB failed to register\n");
  363. return ret;
  364. }
  365. }
  366. if (s->video_dev.v4l2_dev == NULL)
  367. return 0;
  368. num = s->video_dev.num;
  369. /* card number + user defined offset + device offset */
  370. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  371. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  372. if (s_mpg->video_dev.v4l2_dev)
  373. num = s_mpg->video_dev.num
  374. + cx18_stream_info[type].num_offset;
  375. }
  376. video_set_drvdata(&s->video_dev, s);
  377. /* Register device. First try the desired minor, then any free one. */
  378. ret = video_register_device_no_warn(&s->video_dev, vfl_type, num);
  379. if (ret < 0) {
  380. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  381. s->name, num);
  382. s->video_dev.v4l2_dev = NULL;
  383. return ret;
  384. }
  385. name = video_device_node_name(&s->video_dev);
  386. switch (vfl_type) {
  387. case VFL_TYPE_GRABBER:
  388. CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
  389. name, s->name, cx->stream_buffers[type],
  390. cx->stream_buf_size[type] / 1024,
  391. (cx->stream_buf_size[type] * 100 / 1024) % 100);
  392. break;
  393. case VFL_TYPE_RADIO:
  394. CX18_INFO("Registered device %s for %s\n", name, s->name);
  395. break;
  396. case VFL_TYPE_VBI:
  397. if (cx->stream_buffers[type])
  398. CX18_INFO("Registered device %s for %s "
  399. "(%d x %d bytes)\n",
  400. name, s->name, cx->stream_buffers[type],
  401. cx->stream_buf_size[type]);
  402. else
  403. CX18_INFO("Registered device %s for %s\n",
  404. name, s->name);
  405. break;
  406. }
  407. return 0;
  408. }
  409. /* Register v4l2 devices */
  410. int cx18_streams_register(struct cx18 *cx)
  411. {
  412. int type;
  413. int err;
  414. int ret = 0;
  415. /* Register V4L2 devices */
  416. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  417. err = cx18_reg_dev(cx, type);
  418. if (err && ret == 0)
  419. ret = err;
  420. }
  421. if (ret == 0)
  422. return 0;
  423. /* One or more streams could not be initialized. Clean 'em all up. */
  424. cx18_streams_cleanup(cx, 1);
  425. return ret;
  426. }
  427. /* Unregister v4l2 devices */
  428. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  429. {
  430. struct video_device *vdev;
  431. int type;
  432. /* Teardown all streams */
  433. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  434. /* The TS has a cx18_dvb structure, not a video_device */
  435. if (type == CX18_ENC_STREAM_TYPE_TS) {
  436. if (cx->streams[type].dvb != NULL) {
  437. if (unregister)
  438. cx18_dvb_unregister(&cx->streams[type]);
  439. kfree(cx->streams[type].dvb);
  440. cx->streams[type].dvb = NULL;
  441. cx18_stream_free(&cx->streams[type]);
  442. }
  443. continue;
  444. }
  445. /* No struct video_device, but can have buffers allocated */
  446. if (type == CX18_ENC_STREAM_TYPE_IDX) {
  447. /* If the module params didn't inhibit IDX ... */
  448. if (cx->stream_buffers[type] != 0) {
  449. cx->stream_buffers[type] = 0;
  450. /*
  451. * Before calling cx18_stream_free(),
  452. * check if the IDX stream was actually set up.
  453. * Needed, since the cx18_probe() error path
  454. * exits through here as well as normal clean up
  455. */
  456. if (cx->streams[type].buffers != 0)
  457. cx18_stream_free(&cx->streams[type]);
  458. }
  459. continue;
  460. }
  461. /* If struct video_device exists, can have buffers allocated */
  462. vdev = &cx->streams[type].video_dev;
  463. if (vdev->v4l2_dev == NULL)
  464. continue;
  465. if (type == CX18_ENC_STREAM_TYPE_YUV)
  466. videobuf_mmap_free(&cx->streams[type].vbuf_q);
  467. cx18_stream_free(&cx->streams[type]);
  468. video_unregister_device(vdev);
  469. }
  470. }
  471. static void cx18_vbi_setup(struct cx18_stream *s)
  472. {
  473. struct cx18 *cx = s->cx;
  474. int raw = cx18_raw_vbi(cx);
  475. u32 data[CX2341X_MBOX_MAX_DATA];
  476. int lines;
  477. if (cx->is_60hz) {
  478. cx->vbi.count = 12;
  479. cx->vbi.start[0] = 10;
  480. cx->vbi.start[1] = 273;
  481. } else { /* PAL/SECAM */
  482. cx->vbi.count = 18;
  483. cx->vbi.start[0] = 6;
  484. cx->vbi.start[1] = 318;
  485. }
  486. /* setup VBI registers */
  487. if (raw)
  488. v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
  489. else
  490. v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
  491. /*
  492. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  493. * VBI when the first analog capture channel starts, as once it starts
  494. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  495. * (i.e. for the VBI capture channels). We also send it for each
  496. * analog capture channel anyway just to make sure we get the proper
  497. * behavior
  498. */
  499. if (raw) {
  500. lines = cx->vbi.count * 2;
  501. } else {
  502. /*
  503. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  504. * The EAV RP code's Field bit toggles on line 4, a few lines
  505. * after the Vertcal Blank bit has already toggled.
  506. * Tell the encoder to capture 21-4+1=18 lines per field,
  507. * since we want lines 10 through 21.
  508. *
  509. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  510. * The EAV RP code's Field bit toggles on line 1, a few lines
  511. * after the Vertcal Blank bit has already toggled.
  512. * (We've actually set the digitizer so that the Field bit
  513. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  514. * lines per field, since we want lines 6 through 23.
  515. */
  516. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  517. }
  518. data[0] = s->handle;
  519. /* Lines per field */
  520. data[1] = (lines / 2) | ((lines / 2) << 16);
  521. /* bytes per line */
  522. data[2] = (raw ? VBI_ACTIVE_SAMPLES
  523. : (cx->is_60hz ? VBI_HBLANK_SAMPLES_60HZ
  524. : VBI_HBLANK_SAMPLES_50HZ));
  525. /* Every X number of frames a VBI interrupt arrives
  526. (frames as in 25 or 30 fps) */
  527. data[3] = 1;
  528. /*
  529. * Set the SAV/EAV RP codes to look for as start/stop points
  530. * when in VIP-1.1 mode
  531. */
  532. if (raw) {
  533. /*
  534. * Start codes for beginning of "active" line in vertical blank
  535. * 0x20 ( VerticalBlank )
  536. * 0x60 ( EvenField VerticalBlank )
  537. */
  538. data[4] = 0x20602060;
  539. /*
  540. * End codes for end of "active" raw lines and regular lines
  541. * 0x30 ( VerticalBlank HorizontalBlank)
  542. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  543. * 0x90 (Task HorizontalBlank)
  544. * 0xd0 (Task EvenField HorizontalBlank)
  545. */
  546. data[5] = 0x307090d0;
  547. } else {
  548. /*
  549. * End codes for active video, we want data in the hblank region
  550. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  551. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  552. *
  553. * Since the V bit is only allowed to toggle in the EAV RP code,
  554. * just before the first active region line, these two
  555. * are problematic:
  556. * 0x90 (Task HorizontalBlank)
  557. * 0xd0 (Task EvenField HorizontalBlank)
  558. *
  559. * We have set the digitzer such that we don't have to worry
  560. * about these problem codes.
  561. */
  562. data[4] = 0xB0F0B0F0;
  563. /*
  564. * Start codes for beginning of active line in vertical blank
  565. * 0xa0 (Task VerticalBlank )
  566. * 0xe0 (Task EvenField VerticalBlank )
  567. */
  568. data[5] = 0xA0E0A0E0;
  569. }
  570. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  571. data[0], data[1], data[2], data[3], data[4], data[5]);
  572. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  573. }
  574. void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
  575. {
  576. struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  577. struct cx18_mdl *mdl;
  578. if (!cx18_stream_enabled(s))
  579. return;
  580. /* Return if the firmware is not running low on MDLs */
  581. if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
  582. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
  583. return;
  584. /* Return if there are no MDLs to rotate back to the firmware */
  585. if (atomic_read(&s->q_full.depth) < 2)
  586. return;
  587. /*
  588. * Take the oldest IDX MDL still holding data, and discard its index
  589. * entries by scheduling the MDL to go back to the firmware
  590. */
  591. mdl = cx18_dequeue(s, &s->q_full);
  592. if (mdl != NULL)
  593. cx18_enqueue(s, mdl, &s->q_free);
  594. }
  595. static
  596. struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
  597. struct cx18_mdl *mdl)
  598. {
  599. struct cx18 *cx = s->cx;
  600. struct cx18_queue *q;
  601. /* Don't give it to the firmware, if we're not running a capture */
  602. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  603. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  604. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  605. return cx18_enqueue(s, mdl, &s->q_free);
  606. q = cx18_enqueue(s, mdl, &s->q_busy);
  607. if (q != &s->q_busy)
  608. return q; /* The firmware has the max MDLs it can handle */
  609. cx18_mdl_sync_for_device(s, mdl);
  610. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  611. (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
  612. s->bufs_per_mdl, mdl->id, s->mdl_size);
  613. return q;
  614. }
  615. static
  616. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  617. {
  618. struct cx18_queue *q;
  619. struct cx18_mdl *mdl;
  620. if (atomic_read(&s->q_free.depth) == 0 ||
  621. atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  622. return;
  623. /* Move from q_free to q_busy notifying the firmware, until the limit */
  624. do {
  625. mdl = cx18_dequeue(s, &s->q_free);
  626. if (mdl == NULL)
  627. break;
  628. q = _cx18_stream_put_mdl_fw(s, mdl);
  629. } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
  630. && q == &s->q_busy);
  631. }
  632. void cx18_out_work_handler(struct work_struct *work)
  633. {
  634. struct cx18_stream *s =
  635. container_of(work, struct cx18_stream, out_work_order);
  636. _cx18_stream_load_fw_queue(s);
  637. }
  638. static void cx18_stream_configure_mdls(struct cx18_stream *s)
  639. {
  640. cx18_unload_queues(s);
  641. switch (s->type) {
  642. case CX18_ENC_STREAM_TYPE_YUV:
  643. /*
  644. * Height should be a multiple of 32 lines.
  645. * Set the MDL size to the exact size needed for one frame.
  646. * Use enough buffers per MDL to cover the MDL size
  647. */
  648. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  649. s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
  650. else
  651. s->mdl_size = 720 * s->cx->cxhdl.height * 2;
  652. s->bufs_per_mdl = s->mdl_size / s->buf_size;
  653. if (s->mdl_size % s->buf_size)
  654. s->bufs_per_mdl++;
  655. break;
  656. case CX18_ENC_STREAM_TYPE_VBI:
  657. s->bufs_per_mdl = 1;
  658. if (cx18_raw_vbi(s->cx)) {
  659. s->mdl_size = (s->cx->is_60hz ? 12 : 18)
  660. * 2 * VBI_ACTIVE_SAMPLES;
  661. } else {
  662. /*
  663. * See comment in cx18_vbi_setup() below about the
  664. * extra lines we capture in sliced VBI mode due to
  665. * the lines on which EAV RP codes toggle.
  666. */
  667. s->mdl_size = s->cx->is_60hz
  668. ? (21 - 4 + 1) * 2 * VBI_HBLANK_SAMPLES_60HZ
  669. : (23 - 2 + 1) * 2 * VBI_HBLANK_SAMPLES_50HZ;
  670. }
  671. break;
  672. default:
  673. s->bufs_per_mdl = 1;
  674. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  675. break;
  676. }
  677. cx18_load_queues(s);
  678. }
  679. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  680. {
  681. u32 data[MAX_MB_ARGUMENTS];
  682. struct cx18 *cx = s->cx;
  683. int captype = 0;
  684. struct cx18_stream *s_idx;
  685. if (!cx18_stream_enabled(s))
  686. return -EINVAL;
  687. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  688. switch (s->type) {
  689. case CX18_ENC_STREAM_TYPE_MPG:
  690. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  691. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  692. cx->dualwatch_jiffies = jiffies;
  693. cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
  694. cx->search_pack_header = 0;
  695. break;
  696. case CX18_ENC_STREAM_TYPE_IDX:
  697. captype = CAPTURE_CHANNEL_TYPE_INDEX;
  698. break;
  699. case CX18_ENC_STREAM_TYPE_TS:
  700. captype = CAPTURE_CHANNEL_TYPE_TS;
  701. break;
  702. case CX18_ENC_STREAM_TYPE_YUV:
  703. captype = CAPTURE_CHANNEL_TYPE_YUV;
  704. break;
  705. case CX18_ENC_STREAM_TYPE_PCM:
  706. captype = CAPTURE_CHANNEL_TYPE_PCM;
  707. break;
  708. case CX18_ENC_STREAM_TYPE_VBI:
  709. #ifdef CX18_ENCODER_PARSES_SLICED
  710. captype = cx18_raw_vbi(cx) ?
  711. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  712. #else
  713. /*
  714. * Currently we set things up so that Sliced VBI from the
  715. * digitizer is handled as Raw VBI by the encoder
  716. */
  717. captype = CAPTURE_CHANNEL_TYPE_VBI;
  718. #endif
  719. cx->vbi.frame = 0;
  720. cx->vbi.inserted_frame = 0;
  721. memset(cx->vbi.sliced_mpeg_size,
  722. 0, sizeof(cx->vbi.sliced_mpeg_size));
  723. break;
  724. default:
  725. return -EINVAL;
  726. }
  727. /* Clear Streamoff flags in case left from last capture */
  728. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  729. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  730. s->handle = data[0];
  731. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  732. /*
  733. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  734. * set up all the parameters, as it is not obvious which parameters the
  735. * firmware shares across capture channel types and which it does not.
  736. *
  737. * Some of the cx18_vapi() calls below apply to only certain capture
  738. * channel types. We're hoping there's no harm in calling most of them
  739. * anyway, as long as the values are all consistent. Setting some
  740. * shared parameters will have no effect once an analog capture channel
  741. * has started streaming.
  742. */
  743. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  744. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  745. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  746. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  747. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  748. /*
  749. * Audio related reset according to
  750. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  751. */
  752. if (atomic_read(&cx->ana_capturing) == 0)
  753. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  754. s->handle, 12);
  755. /*
  756. * Number of lines for Field 1 & Field 2 according to
  757. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  758. * Field 1 is 312 for 625 line systems in BT.656
  759. * Field 2 is 313 for 625 line systems in BT.656
  760. */
  761. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  762. s->handle, 312, 313);
  763. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  764. cx18_vbi_setup(s);
  765. /*
  766. * Select to receive I, P, and B frame index entries, if the
  767. * index stream is enabled. Otherwise disable index entry
  768. * generation.
  769. */
  770. s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  771. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
  772. s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
  773. /* Call out to the common CX2341x API setup for user controls */
  774. cx->cxhdl.priv = s;
  775. cx2341x_handler_setup(&cx->cxhdl);
  776. /*
  777. * When starting a capture and we're set for radio,
  778. * ensure the video is muted, despite the user control.
  779. */
  780. if (!cx->cxhdl.video_mute &&
  781. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  782. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  783. (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
  784. /* Enable the Video Format Converter for UYVY 4:2:2 support,
  785. * rather than the default HM12 Macroblovk 4:2:0 support.
  786. */
  787. if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
  788. if (s->pixelformat == V4L2_PIX_FMT_UYVY)
  789. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  790. s->handle, 1);
  791. else
  792. /* If in doubt, default to HM12 */
  793. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  794. s->handle, 0);
  795. }
  796. }
  797. if (atomic_read(&cx->tot_capturing) == 0) {
  798. cx2341x_handler_set_busy(&cx->cxhdl, 1);
  799. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  800. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  801. }
  802. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  803. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  804. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  805. /* Init all the cpu_mdls for this stream */
  806. cx18_stream_configure_mdls(s);
  807. _cx18_stream_load_fw_queue(s);
  808. /* begin_capture */
  809. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  810. CX18_DEBUG_WARN("Error starting capture!\n");
  811. /* Ensure we're really not capturing before releasing MDLs */
  812. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  813. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  814. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  815. else
  816. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  817. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  818. /* FIXME - CX18_F_S_STREAMOFF as well? */
  819. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  820. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  821. s->handle = CX18_INVALID_TASK_HANDLE;
  822. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  823. if (atomic_read(&cx->tot_capturing) == 0) {
  824. set_bit(CX18_F_I_EOS, &cx->i_flags);
  825. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  826. }
  827. return -EINVAL;
  828. }
  829. /* you're live! sit back and await interrupts :) */
  830. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  831. atomic_inc(&cx->ana_capturing);
  832. atomic_inc(&cx->tot_capturing);
  833. return 0;
  834. }
  835. EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
  836. void cx18_stop_all_captures(struct cx18 *cx)
  837. {
  838. int i;
  839. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  840. struct cx18_stream *s = &cx->streams[i];
  841. if (!cx18_stream_enabled(s))
  842. continue;
  843. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  844. cx18_stop_v4l2_encode_stream(s, 0);
  845. }
  846. }
  847. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  848. {
  849. struct cx18 *cx = s->cx;
  850. if (!cx18_stream_enabled(s))
  851. return -EINVAL;
  852. /* This function assumes that you are allowed to stop the capture
  853. and that we are actually capturing */
  854. CX18_DEBUG_INFO("Stop Capture\n");
  855. if (atomic_read(&cx->tot_capturing) == 0)
  856. return 0;
  857. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  858. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  859. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  860. else
  861. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  862. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  863. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  864. }
  865. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  866. atomic_dec(&cx->ana_capturing);
  867. atomic_dec(&cx->tot_capturing);
  868. /* Clear capture and no-read bits */
  869. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  870. /* Tell the CX23418 it can't use our buffers anymore */
  871. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  872. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  873. s->handle = CX18_INVALID_TASK_HANDLE;
  874. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  875. if (atomic_read(&cx->tot_capturing) > 0)
  876. return 0;
  877. cx2341x_handler_set_busy(&cx->cxhdl, 0);
  878. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  879. wake_up(&s->waitq);
  880. return 0;
  881. }
  882. EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
  883. u32 cx18_find_handle(struct cx18 *cx)
  884. {
  885. int i;
  886. /* find first available handle to be used for global settings */
  887. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  888. struct cx18_stream *s = &cx->streams[i];
  889. if (s->video_dev.v4l2_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  890. return s->handle;
  891. }
  892. return CX18_INVALID_TASK_HANDLE;
  893. }
  894. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  895. {
  896. int i;
  897. struct cx18_stream *s;
  898. if (handle == CX18_INVALID_TASK_HANDLE)
  899. return NULL;
  900. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  901. s = &cx->streams[i];
  902. if (s->handle != handle)
  903. continue;
  904. if (cx18_stream_enabled(s))
  905. return s;
  906. }
  907. return NULL;
  908. }