cx18-dvb.c 17 KB

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  1. /*
  2. * cx18 functions for DVB support
  3. *
  4. * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org>
  5. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. *
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include "cx18-version.h"
  23. #include "cx18-dvb.h"
  24. #include "cx18-io.h"
  25. #include "cx18-queue.h"
  26. #include "cx18-streams.h"
  27. #include "cx18-cards.h"
  28. #include "cx18-gpio.h"
  29. #include "s5h1409.h"
  30. #include "mxl5005s.h"
  31. #include "s5h1411.h"
  32. #include "tda18271.h"
  33. #include "zl10353.h"
  34. #include <linux/firmware.h>
  35. #include "mt352.h"
  36. #include "mt352_priv.h"
  37. #include "tuner-xc2028.h"
  38. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  39. #define FWFILE "dvb-cx18-mpc718-mt352.fw"
  40. #define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000
  41. #define CX18_CLOCK_ENABLE2 0xc71024
  42. #define CX18_DMUX_CLK_MASK 0x0080
  43. /*
  44. * CX18_CARD_HVR_1600_ESMT
  45. * CX18_CARD_HVR_1600_SAMSUNG
  46. */
  47. static struct mxl5005s_config hauppauge_hvr1600_tuner = {
  48. .i2c_address = 0xC6 >> 1,
  49. .if_freq = IF_FREQ_5380000HZ,
  50. .xtal_freq = CRYSTAL_FREQ_16000000HZ,
  51. .agc_mode = MXL_SINGLE_AGC,
  52. .tracking_filter = MXL_TF_C_H,
  53. .rssi_enable = MXL_RSSI_ENABLE,
  54. .cap_select = MXL_CAP_SEL_ENABLE,
  55. .div_out = MXL_DIV_OUT_4,
  56. .clock_out = MXL_CLOCK_OUT_DISABLE,
  57. .output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM,
  58. .top = MXL5005S_TOP_25P2,
  59. .mod_mode = MXL_DIGITAL_MODE,
  60. .if_mode = MXL_ZERO_IF,
  61. .qam_gain = 0x02,
  62. .AgcMasterByte = 0x00,
  63. };
  64. static struct s5h1409_config hauppauge_hvr1600_config = {
  65. .demod_address = 0x32 >> 1,
  66. .output_mode = S5H1409_SERIAL_OUTPUT,
  67. .gpio = S5H1409_GPIO_ON,
  68. .qam_if = 44000,
  69. .inversion = S5H1409_INVERSION_OFF,
  70. .status_mode = S5H1409_DEMODLOCKING,
  71. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  72. .hvr1600_opt = S5H1409_HVR1600_OPTIMIZE
  73. };
  74. /*
  75. * CX18_CARD_HVR_1600_S5H1411
  76. */
  77. static struct s5h1411_config hcw_s5h1411_config = {
  78. .output_mode = S5H1411_SERIAL_OUTPUT,
  79. .gpio = S5H1411_GPIO_OFF,
  80. .vsb_if = S5H1411_IF_44000,
  81. .qam_if = S5H1411_IF_4000,
  82. .inversion = S5H1411_INVERSION_ON,
  83. .status_mode = S5H1411_DEMODLOCKING,
  84. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  85. };
  86. static struct tda18271_std_map hauppauge_tda18271_std_map = {
  87. .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
  88. .if_lvl = 6, .rfagc_top = 0x37 },
  89. .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
  90. .if_lvl = 6, .rfagc_top = 0x37 },
  91. };
  92. static struct tda18271_config hauppauge_tda18271_config = {
  93. .std_map = &hauppauge_tda18271_std_map,
  94. .gate = TDA18271_GATE_DIGITAL,
  95. .output_opt = TDA18271_OUTPUT_LT_OFF,
  96. };
  97. /*
  98. * CX18_CARD_LEADTEK_DVR3100H
  99. */
  100. /* Information/confirmation of proper config values provided by Terry Wu */
  101. static struct zl10353_config leadtek_dvr3100h_demod = {
  102. .demod_address = 0x1e >> 1, /* Datasheet suggested straps */
  103. .if2 = 45600, /* 4.560 MHz IF from the XC3028 */
  104. .parallel_ts = 1, /* Not a serial TS */
  105. .no_tuner = 1, /* XC3028 is not behind the gate */
  106. .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
  107. };
  108. /*
  109. * CX18_CARD_YUAN_MPC718
  110. */
  111. /*
  112. * Due to
  113. *
  114. * 1. an absence of information on how to prgram the MT352
  115. * 2. the Linux mt352 module pushing MT352 initialzation off onto us here
  116. *
  117. * We have to use an init sequence that *you* must extract from the Windows
  118. * driver (yuanrap.sys) and which we load as a firmware.
  119. *
  120. * If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual
  121. * with chip programming details, then I can remove this annoyance.
  122. */
  123. static int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream,
  124. const struct firmware **fw)
  125. {
  126. struct cx18 *cx = stream->cx;
  127. const char *fn = FWFILE;
  128. int ret;
  129. ret = request_firmware(fw, fn, &cx->pci_dev->dev);
  130. if (ret)
  131. CX18_ERR("Unable to open firmware file %s\n", fn);
  132. else {
  133. size_t sz = (*fw)->size;
  134. if (sz < 2 || sz > 64 || (sz % 2) != 0) {
  135. CX18_ERR("Firmware %s has a bad size: %lu bytes\n",
  136. fn, (unsigned long) sz);
  137. ret = -EILSEQ;
  138. release_firmware(*fw);
  139. *fw = NULL;
  140. }
  141. }
  142. if (ret) {
  143. CX18_ERR("The MPC718 board variant with the MT352 DVB-T"
  144. "demodualtor will not work without it\n");
  145. CX18_ERR("Run 'linux/Documentation/dvb/get_dvb_firmware "
  146. "mpc718' if you need the firmware\n");
  147. }
  148. return ret;
  149. }
  150. static int yuan_mpc718_mt352_init(struct dvb_frontend *fe)
  151. {
  152. struct cx18_dvb *dvb = container_of(fe->dvb,
  153. struct cx18_dvb, dvb_adapter);
  154. struct cx18_stream *stream = dvb->stream;
  155. const struct firmware *fw = NULL;
  156. int ret;
  157. int i;
  158. u8 buf[3];
  159. ret = yuan_mpc718_mt352_reqfw(stream, &fw);
  160. if (ret)
  161. return ret;
  162. /* Loop through all the register-value pairs in the firmware file */
  163. for (i = 0; i < fw->size; i += 2) {
  164. buf[0] = fw->data[i];
  165. /* Intercept a few registers we want to set ourselves */
  166. switch (buf[0]) {
  167. case TRL_NOMINAL_RATE_0:
  168. /* Set our custom OFDM bandwidth in the case below */
  169. break;
  170. case TRL_NOMINAL_RATE_1:
  171. /* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */
  172. /* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */
  173. /* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */
  174. buf[1] = 0x72;
  175. buf[2] = 0x49;
  176. mt352_write(fe, buf, 3);
  177. break;
  178. case INPUT_FREQ_0:
  179. /* Set our custom IF in the case below */
  180. break;
  181. case INPUT_FREQ_1:
  182. /* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */
  183. buf[1] = 0x31;
  184. buf[2] = 0xc0;
  185. mt352_write(fe, buf, 3);
  186. break;
  187. default:
  188. /* Pass through the register-value pair from the fw */
  189. buf[1] = fw->data[i+1];
  190. mt352_write(fe, buf, 2);
  191. break;
  192. }
  193. }
  194. buf[0] = (u8) TUNER_GO;
  195. buf[1] = 0x01; /* Go */
  196. mt352_write(fe, buf, 2);
  197. release_firmware(fw);
  198. return 0;
  199. }
  200. static struct mt352_config yuan_mpc718_mt352_demod = {
  201. .demod_address = 0x1e >> 1,
  202. .adc_clock = 20480, /* 20.480 MHz */
  203. .if2 = 4560, /* 4.560 MHz */
  204. .no_tuner = 1, /* XC3028 is not behind the gate */
  205. .demod_init = yuan_mpc718_mt352_init,
  206. };
  207. static struct zl10353_config yuan_mpc718_zl10353_demod = {
  208. .demod_address = 0x1e >> 1, /* Datasheet suggested straps */
  209. .if2 = 45600, /* 4.560 MHz IF from the XC3028 */
  210. .parallel_ts = 1, /* Not a serial TS */
  211. .no_tuner = 1, /* XC3028 is not behind the gate */
  212. .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
  213. };
  214. static struct zl10353_config gotview_dvd3_zl10353_demod = {
  215. .demod_address = 0x1e >> 1, /* Datasheet suggested straps */
  216. .if2 = 45600, /* 4.560 MHz IF from the XC3028 */
  217. .parallel_ts = 1, /* Not a serial TS */
  218. .no_tuner = 1, /* XC3028 is not behind the gate */
  219. .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */
  220. };
  221. static int dvb_register(struct cx18_stream *stream);
  222. /* Kernel DVB framework calls this when the feed needs to start.
  223. * The CX18 framework should enable the transport DMA handling
  224. * and queue processing.
  225. */
  226. static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
  227. {
  228. struct dvb_demux *demux = feed->demux;
  229. struct cx18_stream *stream = (struct cx18_stream *) demux->priv;
  230. struct cx18 *cx;
  231. int ret;
  232. u32 v;
  233. if (!stream)
  234. return -EINVAL;
  235. cx = stream->cx;
  236. CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n",
  237. feed->pid, feed->index);
  238. mutex_lock(&cx->serialize_lock);
  239. ret = cx18_init_on_first_open(cx);
  240. mutex_unlock(&cx->serialize_lock);
  241. if (ret) {
  242. CX18_ERR("Failed to initialize firmware starting DVB feed\n");
  243. return ret;
  244. }
  245. ret = -EINVAL;
  246. switch (cx->card->type) {
  247. case CX18_CARD_HVR_1600_ESMT:
  248. case CX18_CARD_HVR_1600_SAMSUNG:
  249. case CX18_CARD_HVR_1600_S5H1411:
  250. v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
  251. v |= 0x00400000; /* Serial Mode */
  252. v |= 0x00002000; /* Data Length - Byte */
  253. v |= 0x00010000; /* Error - Polarity */
  254. v |= 0x00020000; /* Error - Passthru */
  255. v |= 0x000c0000; /* Error - Ignore */
  256. cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
  257. break;
  258. case CX18_CARD_LEADTEK_DVR3100H:
  259. case CX18_CARD_YUAN_MPC718:
  260. case CX18_CARD_GOTVIEW_PCI_DVD3:
  261. default:
  262. /* Assumption - Parallel transport - Signalling
  263. * undefined or default.
  264. */
  265. break;
  266. }
  267. if (!demux->dmx.frontend)
  268. return -EINVAL;
  269. mutex_lock(&stream->dvb->feedlock);
  270. if (stream->dvb->feeding++ == 0) {
  271. CX18_DEBUG_INFO("Starting Transport DMA\n");
  272. mutex_lock(&cx->serialize_lock);
  273. set_bit(CX18_F_S_STREAMING, &stream->s_flags);
  274. ret = cx18_start_v4l2_encode_stream(stream);
  275. if (ret < 0) {
  276. CX18_DEBUG_INFO("Failed to start Transport DMA\n");
  277. stream->dvb->feeding--;
  278. if (stream->dvb->feeding == 0)
  279. clear_bit(CX18_F_S_STREAMING, &stream->s_flags);
  280. }
  281. mutex_unlock(&cx->serialize_lock);
  282. } else
  283. ret = 0;
  284. mutex_unlock(&stream->dvb->feedlock);
  285. return ret;
  286. }
  287. /* Kernel DVB framework calls this when the feed needs to stop. */
  288. static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed)
  289. {
  290. struct dvb_demux *demux = feed->demux;
  291. struct cx18_stream *stream = (struct cx18_stream *)demux->priv;
  292. struct cx18 *cx;
  293. int ret = -EINVAL;
  294. if (stream) {
  295. cx = stream->cx;
  296. CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n",
  297. feed->pid, feed->index);
  298. mutex_lock(&stream->dvb->feedlock);
  299. if (--stream->dvb->feeding == 0) {
  300. CX18_DEBUG_INFO("Stopping Transport DMA\n");
  301. mutex_lock(&cx->serialize_lock);
  302. ret = cx18_stop_v4l2_encode_stream(stream, 0);
  303. mutex_unlock(&cx->serialize_lock);
  304. } else
  305. ret = 0;
  306. mutex_unlock(&stream->dvb->feedlock);
  307. }
  308. return ret;
  309. }
  310. int cx18_dvb_register(struct cx18_stream *stream)
  311. {
  312. struct cx18 *cx = stream->cx;
  313. struct cx18_dvb *dvb = stream->dvb;
  314. struct dvb_adapter *dvb_adapter;
  315. struct dvb_demux *dvbdemux;
  316. struct dmx_demux *dmx;
  317. int ret;
  318. if (!dvb)
  319. return -EINVAL;
  320. dvb->enabled = 0;
  321. dvb->stream = stream;
  322. ret = dvb_register_adapter(&dvb->dvb_adapter,
  323. CX18_DRIVER_NAME,
  324. THIS_MODULE, &cx->pci_dev->dev, adapter_nr);
  325. if (ret < 0)
  326. goto err_out;
  327. dvb_adapter = &dvb->dvb_adapter;
  328. dvbdemux = &dvb->demux;
  329. dvbdemux->priv = (void *)stream;
  330. dvbdemux->filternum = 256;
  331. dvbdemux->feednum = 256;
  332. dvbdemux->start_feed = cx18_dvb_start_feed;
  333. dvbdemux->stop_feed = cx18_dvb_stop_feed;
  334. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  335. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  336. ret = dvb_dmx_init(dvbdemux);
  337. if (ret < 0)
  338. goto err_dvb_unregister_adapter;
  339. dmx = &dvbdemux->dmx;
  340. dvb->hw_frontend.source = DMX_FRONTEND_0;
  341. dvb->mem_frontend.source = DMX_MEMORY_FE;
  342. dvb->dmxdev.filternum = 256;
  343. dvb->dmxdev.demux = dmx;
  344. ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter);
  345. if (ret < 0)
  346. goto err_dvb_dmx_release;
  347. ret = dmx->add_frontend(dmx, &dvb->hw_frontend);
  348. if (ret < 0)
  349. goto err_dvb_dmxdev_release;
  350. ret = dmx->add_frontend(dmx, &dvb->mem_frontend);
  351. if (ret < 0)
  352. goto err_remove_hw_frontend;
  353. ret = dmx->connect_frontend(dmx, &dvb->hw_frontend);
  354. if (ret < 0)
  355. goto err_remove_mem_frontend;
  356. ret = dvb_register(stream);
  357. if (ret < 0)
  358. goto err_disconnect_frontend;
  359. dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx);
  360. CX18_INFO("DVB Frontend registered\n");
  361. CX18_INFO("Registered DVB adapter%d for %s (%d x %d.%02d kB)\n",
  362. stream->dvb->dvb_adapter.num, stream->name,
  363. stream->buffers, stream->buf_size/1024,
  364. (stream->buf_size * 100 / 1024) % 100);
  365. mutex_init(&dvb->feedlock);
  366. dvb->enabled = 1;
  367. return ret;
  368. err_disconnect_frontend:
  369. dmx->disconnect_frontend(dmx);
  370. err_remove_mem_frontend:
  371. dmx->remove_frontend(dmx, &dvb->mem_frontend);
  372. err_remove_hw_frontend:
  373. dmx->remove_frontend(dmx, &dvb->hw_frontend);
  374. err_dvb_dmxdev_release:
  375. dvb_dmxdev_release(&dvb->dmxdev);
  376. err_dvb_dmx_release:
  377. dvb_dmx_release(dvbdemux);
  378. err_dvb_unregister_adapter:
  379. dvb_unregister_adapter(dvb_adapter);
  380. err_out:
  381. return ret;
  382. }
  383. void cx18_dvb_unregister(struct cx18_stream *stream)
  384. {
  385. struct cx18 *cx = stream->cx;
  386. struct cx18_dvb *dvb = stream->dvb;
  387. struct dvb_adapter *dvb_adapter;
  388. struct dvb_demux *dvbdemux;
  389. struct dmx_demux *dmx;
  390. CX18_INFO("unregister DVB\n");
  391. if (dvb == NULL || !dvb->enabled)
  392. return;
  393. dvb_adapter = &dvb->dvb_adapter;
  394. dvbdemux = &dvb->demux;
  395. dmx = &dvbdemux->dmx;
  396. dmx->close(dmx);
  397. dvb_net_release(&dvb->dvbnet);
  398. dmx->remove_frontend(dmx, &dvb->mem_frontend);
  399. dmx->remove_frontend(dmx, &dvb->hw_frontend);
  400. dvb_dmxdev_release(&dvb->dmxdev);
  401. dvb_dmx_release(dvbdemux);
  402. dvb_unregister_frontend(dvb->fe);
  403. dvb_frontend_detach(dvb->fe);
  404. dvb_unregister_adapter(dvb_adapter);
  405. }
  406. /* All the DVB attach calls go here, this function get's modified
  407. * for each new card. cx18_dvb_start_feed() will also need changes.
  408. */
  409. static int dvb_register(struct cx18_stream *stream)
  410. {
  411. struct cx18_dvb *dvb = stream->dvb;
  412. struct cx18 *cx = stream->cx;
  413. int ret = 0;
  414. switch (cx->card->type) {
  415. case CX18_CARD_HVR_1600_ESMT:
  416. case CX18_CARD_HVR_1600_SAMSUNG:
  417. dvb->fe = dvb_attach(s5h1409_attach,
  418. &hauppauge_hvr1600_config,
  419. &cx->i2c_adap[0]);
  420. if (dvb->fe != NULL) {
  421. dvb_attach(mxl5005s_attach, dvb->fe,
  422. &cx->i2c_adap[0],
  423. &hauppauge_hvr1600_tuner);
  424. ret = 0;
  425. }
  426. break;
  427. case CX18_CARD_HVR_1600_S5H1411:
  428. dvb->fe = dvb_attach(s5h1411_attach,
  429. &hcw_s5h1411_config,
  430. &cx->i2c_adap[0]);
  431. if (dvb->fe != NULL)
  432. dvb_attach(tda18271_attach, dvb->fe,
  433. 0x60, &cx->i2c_adap[0],
  434. &hauppauge_tda18271_config);
  435. break;
  436. case CX18_CARD_LEADTEK_DVR3100H:
  437. dvb->fe = dvb_attach(zl10353_attach,
  438. &leadtek_dvr3100h_demod,
  439. &cx->i2c_adap[1]);
  440. if (dvb->fe != NULL) {
  441. struct dvb_frontend *fe;
  442. struct xc2028_config cfg = {
  443. .i2c_adap = &cx->i2c_adap[1],
  444. .i2c_addr = 0xc2 >> 1,
  445. .ctrl = NULL,
  446. };
  447. static struct xc2028_ctrl ctrl = {
  448. .fname = XC2028_DEFAULT_FIRMWARE,
  449. .max_len = 64,
  450. .demod = XC3028_FE_ZARLINK456,
  451. .type = XC2028_AUTO,
  452. };
  453. fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
  454. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  455. fe->ops.tuner_ops.set_config(fe, &ctrl);
  456. }
  457. break;
  458. case CX18_CARD_YUAN_MPC718:
  459. /*
  460. * TODO
  461. * Apparently, these cards also could instead have a
  462. * DiBcom demod supported by one of the db7000 drivers
  463. */
  464. dvb->fe = dvb_attach(mt352_attach,
  465. &yuan_mpc718_mt352_demod,
  466. &cx->i2c_adap[1]);
  467. if (dvb->fe == NULL)
  468. dvb->fe = dvb_attach(zl10353_attach,
  469. &yuan_mpc718_zl10353_demod,
  470. &cx->i2c_adap[1]);
  471. if (dvb->fe != NULL) {
  472. struct dvb_frontend *fe;
  473. struct xc2028_config cfg = {
  474. .i2c_adap = &cx->i2c_adap[1],
  475. .i2c_addr = 0xc2 >> 1,
  476. .ctrl = NULL,
  477. };
  478. static struct xc2028_ctrl ctrl = {
  479. .fname = XC2028_DEFAULT_FIRMWARE,
  480. .max_len = 64,
  481. .demod = XC3028_FE_ZARLINK456,
  482. .type = XC2028_AUTO,
  483. };
  484. fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
  485. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  486. fe->ops.tuner_ops.set_config(fe, &ctrl);
  487. }
  488. break;
  489. case CX18_CARD_GOTVIEW_PCI_DVD3:
  490. dvb->fe = dvb_attach(zl10353_attach,
  491. &gotview_dvd3_zl10353_demod,
  492. &cx->i2c_adap[1]);
  493. if (dvb->fe != NULL) {
  494. struct dvb_frontend *fe;
  495. struct xc2028_config cfg = {
  496. .i2c_adap = &cx->i2c_adap[1],
  497. .i2c_addr = 0xc2 >> 1,
  498. .ctrl = NULL,
  499. };
  500. static struct xc2028_ctrl ctrl = {
  501. .fname = XC2028_DEFAULT_FIRMWARE,
  502. .max_len = 64,
  503. .demod = XC3028_FE_ZARLINK456,
  504. .type = XC2028_AUTO,
  505. };
  506. fe = dvb_attach(xc2028_attach, dvb->fe, &cfg);
  507. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  508. fe->ops.tuner_ops.set_config(fe, &ctrl);
  509. }
  510. break;
  511. default:
  512. /* No Digital Tv Support */
  513. break;
  514. }
  515. if (dvb->fe == NULL) {
  516. CX18_ERR("frontend initialization failed\n");
  517. return -1;
  518. }
  519. dvb->fe->callback = cx18_reset_tuner_gpio;
  520. ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe);
  521. if (ret < 0) {
  522. if (dvb->fe->ops.release)
  523. dvb->fe->ops.release(dvb->fe);
  524. return ret;
  525. }
  526. /*
  527. * The firmware seems to enable the TS DMUX clock
  528. * under various circumstances. However, since we know we
  529. * might use it, let's just turn it on ourselves here.
  530. */
  531. cx18_write_reg_expect(cx,
  532. (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK,
  533. CX18_CLOCK_ENABLE2,
  534. CX18_DMUX_CLK_MASK,
  535. (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK);
  536. return ret;
  537. }
  538. MODULE_FIRMWARE(FWFILE);