uc.c 16 KB

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  1. /*
  2. * Copyright(c) 2015, 2016 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include "hfi.h"
  48. #include "verbs_txreq.h"
  49. #include "qp.h"
  50. /* cut down ridiculously long IB macro names */
  51. #define OP(x) UC_OP(x)
  52. /**
  53. * hfi1_make_uc_req - construct a request packet (SEND, RDMA write)
  54. * @qp: a pointer to the QP
  55. *
  56. * Assume s_lock is held.
  57. *
  58. * Return 1 if constructed; otherwise, return 0.
  59. */
  60. int hfi1_make_uc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
  61. {
  62. struct hfi1_qp_priv *priv = qp->priv;
  63. struct ib_other_headers *ohdr;
  64. struct rvt_swqe *wqe;
  65. u32 hwords = 5;
  66. u32 bth0 = 0;
  67. u32 len;
  68. u32 pmtu = qp->pmtu;
  69. int middle = 0;
  70. ps->s_txreq = get_txreq(ps->dev, qp);
  71. if (IS_ERR(ps->s_txreq))
  72. goto bail_no_tx;
  73. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
  74. if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
  75. goto bail;
  76. /* We are in the error state, flush the work request. */
  77. smp_read_barrier_depends(); /* see post_one_send() */
  78. if (qp->s_last == ACCESS_ONCE(qp->s_head))
  79. goto bail;
  80. /* If DMAs are in progress, we can't flush immediately. */
  81. if (iowait_sdma_pending(&priv->s_iowait)) {
  82. qp->s_flags |= RVT_S_WAIT_DMA;
  83. goto bail;
  84. }
  85. clear_ahg(qp);
  86. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  87. hfi1_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
  88. goto done_free_tx;
  89. }
  90. ohdr = &ps->s_txreq->phdr.hdr.u.oth;
  91. if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
  92. ohdr = &ps->s_txreq->phdr.hdr.u.l.oth;
  93. /* Get the next send request. */
  94. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  95. qp->s_wqe = NULL;
  96. switch (qp->s_state) {
  97. default:
  98. if (!(ib_rvt_state_ops[qp->state] &
  99. RVT_PROCESS_NEXT_SEND_OK))
  100. goto bail;
  101. /* Check if send work queue is empty. */
  102. smp_read_barrier_depends(); /* see post_one_send() */
  103. if (qp->s_cur == ACCESS_ONCE(qp->s_head)) {
  104. clear_ahg(qp);
  105. goto bail;
  106. }
  107. /*
  108. * Local operations are processed immediately
  109. * after all prior requests have completed.
  110. */
  111. if (wqe->wr.opcode == IB_WR_REG_MR ||
  112. wqe->wr.opcode == IB_WR_LOCAL_INV) {
  113. int local_ops = 0;
  114. int err = 0;
  115. if (qp->s_last != qp->s_cur)
  116. goto bail;
  117. if (++qp->s_cur == qp->s_size)
  118. qp->s_cur = 0;
  119. if (!(wqe->wr.send_flags & RVT_SEND_COMPLETION_ONLY)) {
  120. err = rvt_invalidate_rkey(
  121. qp, wqe->wr.ex.invalidate_rkey);
  122. local_ops = 1;
  123. }
  124. hfi1_send_complete(qp, wqe, err ? IB_WC_LOC_PROT_ERR
  125. : IB_WC_SUCCESS);
  126. if (local_ops)
  127. atomic_dec(&qp->local_ops_pending);
  128. qp->s_hdrwords = 0;
  129. goto done_free_tx;
  130. }
  131. /*
  132. * Start a new request.
  133. */
  134. qp->s_psn = wqe->psn;
  135. qp->s_sge.sge = wqe->sg_list[0];
  136. qp->s_sge.sg_list = wqe->sg_list + 1;
  137. qp->s_sge.num_sge = wqe->wr.num_sge;
  138. qp->s_sge.total_len = wqe->length;
  139. len = wqe->length;
  140. qp->s_len = len;
  141. switch (wqe->wr.opcode) {
  142. case IB_WR_SEND:
  143. case IB_WR_SEND_WITH_IMM:
  144. if (len > pmtu) {
  145. qp->s_state = OP(SEND_FIRST);
  146. len = pmtu;
  147. break;
  148. }
  149. if (wqe->wr.opcode == IB_WR_SEND) {
  150. qp->s_state = OP(SEND_ONLY);
  151. } else {
  152. qp->s_state =
  153. OP(SEND_ONLY_WITH_IMMEDIATE);
  154. /* Immediate data comes after the BTH */
  155. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  156. hwords += 1;
  157. }
  158. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  159. bth0 |= IB_BTH_SOLICITED;
  160. qp->s_wqe = wqe;
  161. if (++qp->s_cur >= qp->s_size)
  162. qp->s_cur = 0;
  163. break;
  164. case IB_WR_RDMA_WRITE:
  165. case IB_WR_RDMA_WRITE_WITH_IMM:
  166. ohdr->u.rc.reth.vaddr =
  167. cpu_to_be64(wqe->rdma_wr.remote_addr);
  168. ohdr->u.rc.reth.rkey =
  169. cpu_to_be32(wqe->rdma_wr.rkey);
  170. ohdr->u.rc.reth.length = cpu_to_be32(len);
  171. hwords += sizeof(struct ib_reth) / 4;
  172. if (len > pmtu) {
  173. qp->s_state = OP(RDMA_WRITE_FIRST);
  174. len = pmtu;
  175. break;
  176. }
  177. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  178. qp->s_state = OP(RDMA_WRITE_ONLY);
  179. } else {
  180. qp->s_state =
  181. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  182. /* Immediate data comes after the RETH */
  183. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  184. hwords += 1;
  185. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  186. bth0 |= IB_BTH_SOLICITED;
  187. }
  188. qp->s_wqe = wqe;
  189. if (++qp->s_cur >= qp->s_size)
  190. qp->s_cur = 0;
  191. break;
  192. default:
  193. goto bail;
  194. }
  195. break;
  196. case OP(SEND_FIRST):
  197. qp->s_state = OP(SEND_MIDDLE);
  198. /* FALLTHROUGH */
  199. case OP(SEND_MIDDLE):
  200. len = qp->s_len;
  201. if (len > pmtu) {
  202. len = pmtu;
  203. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  204. break;
  205. }
  206. if (wqe->wr.opcode == IB_WR_SEND) {
  207. qp->s_state = OP(SEND_LAST);
  208. } else {
  209. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  210. /* Immediate data comes after the BTH */
  211. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  212. hwords += 1;
  213. }
  214. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  215. bth0 |= IB_BTH_SOLICITED;
  216. qp->s_wqe = wqe;
  217. if (++qp->s_cur >= qp->s_size)
  218. qp->s_cur = 0;
  219. break;
  220. case OP(RDMA_WRITE_FIRST):
  221. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  222. /* FALLTHROUGH */
  223. case OP(RDMA_WRITE_MIDDLE):
  224. len = qp->s_len;
  225. if (len > pmtu) {
  226. len = pmtu;
  227. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  228. break;
  229. }
  230. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  231. qp->s_state = OP(RDMA_WRITE_LAST);
  232. } else {
  233. qp->s_state =
  234. OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  235. /* Immediate data comes after the BTH */
  236. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  237. hwords += 1;
  238. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  239. bth0 |= IB_BTH_SOLICITED;
  240. }
  241. qp->s_wqe = wqe;
  242. if (++qp->s_cur >= qp->s_size)
  243. qp->s_cur = 0;
  244. break;
  245. }
  246. qp->s_len -= len;
  247. qp->s_hdrwords = hwords;
  248. ps->s_txreq->sde = priv->s_sde;
  249. qp->s_cur_sge = &qp->s_sge;
  250. qp->s_cur_size = len;
  251. hfi1_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24),
  252. mask_psn(qp->s_psn++), middle, ps);
  253. /* pbc */
  254. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  255. return 1;
  256. done_free_tx:
  257. hfi1_put_txreq(ps->s_txreq);
  258. ps->s_txreq = NULL;
  259. return 1;
  260. bail:
  261. hfi1_put_txreq(ps->s_txreq);
  262. bail_no_tx:
  263. ps->s_txreq = NULL;
  264. qp->s_flags &= ~RVT_S_BUSY;
  265. qp->s_hdrwords = 0;
  266. return 0;
  267. }
  268. /**
  269. * hfi1_uc_rcv - handle an incoming UC packet
  270. * @ibp: the port the packet came in on
  271. * @hdr: the header of the packet
  272. * @rcv_flags: flags relevant to rcv processing
  273. * @data: the packet data
  274. * @tlen: the length of the packet
  275. * @qp: the QP for this packet.
  276. *
  277. * This is called from qp_rcv() to process an incoming UC packet
  278. * for the given QP.
  279. * Called at interrupt level.
  280. */
  281. void hfi1_uc_rcv(struct hfi1_packet *packet)
  282. {
  283. struct hfi1_ibport *ibp = &packet->rcd->ppd->ibport_data;
  284. struct ib_header *hdr = packet->hdr;
  285. u32 rcv_flags = packet->rcv_flags;
  286. void *data = packet->ebuf;
  287. u32 tlen = packet->tlen;
  288. struct rvt_qp *qp = packet->qp;
  289. struct ib_other_headers *ohdr = packet->ohdr;
  290. u32 bth0, opcode;
  291. u32 hdrsize = packet->hlen;
  292. u32 psn;
  293. u32 pad;
  294. struct ib_wc wc;
  295. u32 pmtu = qp->pmtu;
  296. struct ib_reth *reth;
  297. int has_grh = rcv_flags & HFI1_HAS_GRH;
  298. int ret;
  299. bth0 = be32_to_cpu(ohdr->bth[0]);
  300. if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0))
  301. return;
  302. process_ecn(qp, packet, true);
  303. psn = be32_to_cpu(ohdr->bth[2]);
  304. opcode = (bth0 >> 24) & 0xff;
  305. /* Compare the PSN verses the expected PSN. */
  306. if (unlikely(cmp_psn(psn, qp->r_psn) != 0)) {
  307. /*
  308. * Handle a sequence error.
  309. * Silently drop any current message.
  310. */
  311. qp->r_psn = psn;
  312. inv:
  313. if (qp->r_state == OP(SEND_FIRST) ||
  314. qp->r_state == OP(SEND_MIDDLE)) {
  315. set_bit(RVT_R_REWIND_SGE, &qp->r_aflags);
  316. qp->r_sge.num_sge = 0;
  317. } else {
  318. rvt_put_ss(&qp->r_sge);
  319. }
  320. qp->r_state = OP(SEND_LAST);
  321. switch (opcode) {
  322. case OP(SEND_FIRST):
  323. case OP(SEND_ONLY):
  324. case OP(SEND_ONLY_WITH_IMMEDIATE):
  325. goto send_first;
  326. case OP(RDMA_WRITE_FIRST):
  327. case OP(RDMA_WRITE_ONLY):
  328. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  329. goto rdma_first;
  330. default:
  331. goto drop;
  332. }
  333. }
  334. /* Check for opcode sequence errors. */
  335. switch (qp->r_state) {
  336. case OP(SEND_FIRST):
  337. case OP(SEND_MIDDLE):
  338. if (opcode == OP(SEND_MIDDLE) ||
  339. opcode == OP(SEND_LAST) ||
  340. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  341. break;
  342. goto inv;
  343. case OP(RDMA_WRITE_FIRST):
  344. case OP(RDMA_WRITE_MIDDLE):
  345. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  346. opcode == OP(RDMA_WRITE_LAST) ||
  347. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  348. break;
  349. goto inv;
  350. default:
  351. if (opcode == OP(SEND_FIRST) ||
  352. opcode == OP(SEND_ONLY) ||
  353. opcode == OP(SEND_ONLY_WITH_IMMEDIATE) ||
  354. opcode == OP(RDMA_WRITE_FIRST) ||
  355. opcode == OP(RDMA_WRITE_ONLY) ||
  356. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  357. break;
  358. goto inv;
  359. }
  360. if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
  361. qp_comm_est(qp);
  362. /* OK, process the packet. */
  363. switch (opcode) {
  364. case OP(SEND_FIRST):
  365. case OP(SEND_ONLY):
  366. case OP(SEND_ONLY_WITH_IMMEDIATE):
  367. send_first:
  368. if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) {
  369. qp->r_sge = qp->s_rdma_read_sge;
  370. } else {
  371. ret = hfi1_rvt_get_rwqe(qp, 0);
  372. if (ret < 0)
  373. goto op_err;
  374. if (!ret)
  375. goto drop;
  376. /*
  377. * qp->s_rdma_read_sge will be the owner
  378. * of the mr references.
  379. */
  380. qp->s_rdma_read_sge = qp->r_sge;
  381. }
  382. qp->r_rcv_len = 0;
  383. if (opcode == OP(SEND_ONLY))
  384. goto no_immediate_data;
  385. else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
  386. goto send_last_imm;
  387. /* FALLTHROUGH */
  388. case OP(SEND_MIDDLE):
  389. /* Check for invalid length PMTU or posted rwqe len. */
  390. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  391. goto rewind;
  392. qp->r_rcv_len += pmtu;
  393. if (unlikely(qp->r_rcv_len > qp->r_len))
  394. goto rewind;
  395. hfi1_copy_sge(&qp->r_sge, data, pmtu, 0, 0);
  396. break;
  397. case OP(SEND_LAST_WITH_IMMEDIATE):
  398. send_last_imm:
  399. wc.ex.imm_data = ohdr->u.imm_data;
  400. wc.wc_flags = IB_WC_WITH_IMM;
  401. goto send_last;
  402. case OP(SEND_LAST):
  403. no_immediate_data:
  404. wc.ex.imm_data = 0;
  405. wc.wc_flags = 0;
  406. send_last:
  407. /* Get the number of bytes the message was padded by. */
  408. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  409. /* Check for invalid length. */
  410. /* LAST len should be >= 1 */
  411. if (unlikely(tlen < (hdrsize + pad + 4)))
  412. goto rewind;
  413. /* Don't count the CRC. */
  414. tlen -= (hdrsize + pad + 4);
  415. wc.byte_len = tlen + qp->r_rcv_len;
  416. if (unlikely(wc.byte_len > qp->r_len))
  417. goto rewind;
  418. wc.opcode = IB_WC_RECV;
  419. hfi1_copy_sge(&qp->r_sge, data, tlen, 0, 0);
  420. rvt_put_ss(&qp->s_rdma_read_sge);
  421. last_imm:
  422. wc.wr_id = qp->r_wr_id;
  423. wc.status = IB_WC_SUCCESS;
  424. wc.qp = &qp->ibqp;
  425. wc.src_qp = qp->remote_qpn;
  426. wc.slid = qp->remote_ah_attr.dlid;
  427. /*
  428. * It seems that IB mandates the presence of an SL in a
  429. * work completion only for the UD transport (see section
  430. * 11.4.2 of IBTA Vol. 1).
  431. *
  432. * However, the way the SL is chosen below is consistent
  433. * with the way that IB/qib works and is trying avoid
  434. * introducing incompatibilities.
  435. *
  436. * See also OPA Vol. 1, section 9.7.6, and table 9-17.
  437. */
  438. wc.sl = qp->remote_ah_attr.sl;
  439. /* zero fields that are N/A */
  440. wc.vendor_err = 0;
  441. wc.pkey_index = 0;
  442. wc.dlid_path_bits = 0;
  443. wc.port_num = 0;
  444. /* Signal completion event if the solicited bit is set. */
  445. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
  446. (ohdr->bth[0] &
  447. cpu_to_be32(IB_BTH_SOLICITED)) != 0);
  448. break;
  449. case OP(RDMA_WRITE_FIRST):
  450. case OP(RDMA_WRITE_ONLY):
  451. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */
  452. rdma_first:
  453. if (unlikely(!(qp->qp_access_flags &
  454. IB_ACCESS_REMOTE_WRITE))) {
  455. goto drop;
  456. }
  457. reth = &ohdr->u.rc.reth;
  458. qp->r_len = be32_to_cpu(reth->length);
  459. qp->r_rcv_len = 0;
  460. qp->r_sge.sg_list = NULL;
  461. if (qp->r_len != 0) {
  462. u32 rkey = be32_to_cpu(reth->rkey);
  463. u64 vaddr = be64_to_cpu(reth->vaddr);
  464. int ok;
  465. /* Check rkey */
  466. ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len,
  467. vaddr, rkey, IB_ACCESS_REMOTE_WRITE);
  468. if (unlikely(!ok))
  469. goto drop;
  470. qp->r_sge.num_sge = 1;
  471. } else {
  472. qp->r_sge.num_sge = 0;
  473. qp->r_sge.sge.mr = NULL;
  474. qp->r_sge.sge.vaddr = NULL;
  475. qp->r_sge.sge.length = 0;
  476. qp->r_sge.sge.sge_length = 0;
  477. }
  478. if (opcode == OP(RDMA_WRITE_ONLY)) {
  479. goto rdma_last;
  480. } else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) {
  481. wc.ex.imm_data = ohdr->u.rc.imm_data;
  482. goto rdma_last_imm;
  483. }
  484. /* FALLTHROUGH */
  485. case OP(RDMA_WRITE_MIDDLE):
  486. /* Check for invalid length PMTU or posted rwqe len. */
  487. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  488. goto drop;
  489. qp->r_rcv_len += pmtu;
  490. if (unlikely(qp->r_rcv_len > qp->r_len))
  491. goto drop;
  492. hfi1_copy_sge(&qp->r_sge, data, pmtu, 1, 0);
  493. break;
  494. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  495. wc.ex.imm_data = ohdr->u.imm_data;
  496. rdma_last_imm:
  497. wc.wc_flags = IB_WC_WITH_IMM;
  498. /* Get the number of bytes the message was padded by. */
  499. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  500. /* Check for invalid length. */
  501. /* LAST len should be >= 1 */
  502. if (unlikely(tlen < (hdrsize + pad + 4)))
  503. goto drop;
  504. /* Don't count the CRC. */
  505. tlen -= (hdrsize + pad + 4);
  506. if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
  507. goto drop;
  508. if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) {
  509. rvt_put_ss(&qp->s_rdma_read_sge);
  510. } else {
  511. ret = hfi1_rvt_get_rwqe(qp, 1);
  512. if (ret < 0)
  513. goto op_err;
  514. if (!ret)
  515. goto drop;
  516. }
  517. wc.byte_len = qp->r_len;
  518. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  519. hfi1_copy_sge(&qp->r_sge, data, tlen, 1, 0);
  520. rvt_put_ss(&qp->r_sge);
  521. goto last_imm;
  522. case OP(RDMA_WRITE_LAST):
  523. rdma_last:
  524. /* Get the number of bytes the message was padded by. */
  525. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  526. /* Check for invalid length. */
  527. /* LAST len should be >= 1 */
  528. if (unlikely(tlen < (hdrsize + pad + 4)))
  529. goto drop;
  530. /* Don't count the CRC. */
  531. tlen -= (hdrsize + pad + 4);
  532. if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
  533. goto drop;
  534. hfi1_copy_sge(&qp->r_sge, data, tlen, 1, 0);
  535. rvt_put_ss(&qp->r_sge);
  536. break;
  537. default:
  538. /* Drop packet for unknown opcodes. */
  539. goto drop;
  540. }
  541. qp->r_psn++;
  542. qp->r_state = opcode;
  543. return;
  544. rewind:
  545. set_bit(RVT_R_REWIND_SGE, &qp->r_aflags);
  546. qp->r_sge.num_sge = 0;
  547. drop:
  548. ibp->rvp.n_pkt_drops++;
  549. return;
  550. op_err:
  551. hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  552. }