trace.c 6.9 KB

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  1. /*
  2. * Copyright(c) 2015, 2016 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #define CREATE_TRACE_POINTS
  48. #include "trace.h"
  49. u8 ibhdr_exhdr_len(struct ib_header *hdr)
  50. {
  51. struct ib_other_headers *ohdr;
  52. u8 opcode;
  53. u8 lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);
  54. if (lnh == HFI1_LRH_BTH)
  55. ohdr = &hdr->u.oth;
  56. else
  57. ohdr = &hdr->u.l.oth;
  58. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  59. return hdr_len_by_opcode[opcode] == 0 ?
  60. 0 : hdr_len_by_opcode[opcode] - (12 + 8);
  61. }
  62. #define IMM_PRN "imm %d"
  63. #define RETH_PRN "reth vaddr 0x%.16llx rkey 0x%.8x dlen 0x%.8x"
  64. #define AETH_PRN "aeth syn 0x%.2x %s msn 0x%.8x"
  65. #define DETH_PRN "deth qkey 0x%.8x sqpn 0x%.6x"
  66. #define IETH_PRN "ieth rkey 0x%.8x"
  67. #define ATOMICACKETH_PRN "origdata %llx"
  68. #define ATOMICETH_PRN "vaddr 0x%llx rkey 0x%.8x sdata %llx cdata %llx"
  69. #define OP(transport, op) IB_OPCODE_## transport ## _ ## op
  70. static const char *parse_syndrome(u8 syndrome)
  71. {
  72. switch (syndrome >> 5) {
  73. case 0:
  74. return "ACK";
  75. case 1:
  76. return "RNRNAK";
  77. case 3:
  78. return "NAK";
  79. }
  80. return "";
  81. }
  82. const char *parse_everbs_hdrs(
  83. struct trace_seq *p,
  84. u8 opcode,
  85. void *ehdrs)
  86. {
  87. union ib_ehdrs *eh = ehdrs;
  88. const char *ret = trace_seq_buffer_ptr(p);
  89. switch (opcode) {
  90. /* imm */
  91. case OP(RC, SEND_LAST_WITH_IMMEDIATE):
  92. case OP(UC, SEND_LAST_WITH_IMMEDIATE):
  93. case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
  94. case OP(UC, SEND_ONLY_WITH_IMMEDIATE):
  95. case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
  96. case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
  97. trace_seq_printf(p, IMM_PRN,
  98. be32_to_cpu(eh->imm_data));
  99. break;
  100. /* reth + imm */
  101. case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  102. case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  103. trace_seq_printf(p, RETH_PRN " " IMM_PRN,
  104. get_ib_reth_vaddr(&eh->rc.reth),
  105. be32_to_cpu(eh->rc.reth.rkey),
  106. be32_to_cpu(eh->rc.reth.length),
  107. be32_to_cpu(eh->rc.imm_data));
  108. break;
  109. /* reth */
  110. case OP(RC, RDMA_READ_REQUEST):
  111. case OP(RC, RDMA_WRITE_FIRST):
  112. case OP(UC, RDMA_WRITE_FIRST):
  113. case OP(RC, RDMA_WRITE_ONLY):
  114. case OP(UC, RDMA_WRITE_ONLY):
  115. trace_seq_printf(p, RETH_PRN,
  116. get_ib_reth_vaddr(&eh->rc.reth),
  117. be32_to_cpu(eh->rc.reth.rkey),
  118. be32_to_cpu(eh->rc.reth.length));
  119. break;
  120. case OP(RC, RDMA_READ_RESPONSE_FIRST):
  121. case OP(RC, RDMA_READ_RESPONSE_LAST):
  122. case OP(RC, RDMA_READ_RESPONSE_ONLY):
  123. case OP(RC, ACKNOWLEDGE):
  124. trace_seq_printf(p, AETH_PRN, be32_to_cpu(eh->aeth) >> 24,
  125. parse_syndrome(be32_to_cpu(eh->aeth) >> 24),
  126. be32_to_cpu(eh->aeth) & HFI1_MSN_MASK);
  127. break;
  128. /* aeth + atomicacketh */
  129. case OP(RC, ATOMIC_ACKNOWLEDGE):
  130. trace_seq_printf(p, AETH_PRN " " ATOMICACKETH_PRN,
  131. be32_to_cpu(eh->at.aeth) >> 24,
  132. parse_syndrome(be32_to_cpu(eh->at.aeth) >> 24),
  133. be32_to_cpu(eh->at.aeth) & HFI1_MSN_MASK,
  134. ib_u64_get(&eh->at.atomic_ack_eth));
  135. break;
  136. /* atomiceth */
  137. case OP(RC, COMPARE_SWAP):
  138. case OP(RC, FETCH_ADD):
  139. trace_seq_printf(p, ATOMICETH_PRN,
  140. get_ib_ateth_vaddr(&eh->atomic_eth),
  141. eh->atomic_eth.rkey,
  142. get_ib_ateth_swap(&eh->atomic_eth),
  143. get_ib_ateth_compare(&eh->atomic_eth));
  144. break;
  145. /* deth */
  146. case OP(UD, SEND_ONLY):
  147. case OP(UD, SEND_ONLY_WITH_IMMEDIATE):
  148. trace_seq_printf(p, DETH_PRN,
  149. be32_to_cpu(eh->ud.deth[0]),
  150. be32_to_cpu(eh->ud.deth[1]) & RVT_QPN_MASK);
  151. break;
  152. /* ieth */
  153. case OP(RC, SEND_LAST_WITH_INVALIDATE):
  154. case OP(RC, SEND_ONLY_WITH_INVALIDATE):
  155. trace_seq_printf(p, IETH_PRN,
  156. be32_to_cpu(eh->ieth));
  157. break;
  158. }
  159. trace_seq_putc(p, 0);
  160. return ret;
  161. }
  162. const char *parse_sdma_flags(
  163. struct trace_seq *p,
  164. u64 desc0, u64 desc1)
  165. {
  166. const char *ret = trace_seq_buffer_ptr(p);
  167. char flags[5] = { 'x', 'x', 'x', 'x', 0 };
  168. flags[0] = (desc1 & SDMA_DESC1_INT_REQ_FLAG) ? 'I' : '-';
  169. flags[1] = (desc1 & SDMA_DESC1_HEAD_TO_HOST_FLAG) ? 'H' : '-';
  170. flags[2] = (desc0 & SDMA_DESC0_FIRST_DESC_FLAG) ? 'F' : '-';
  171. flags[3] = (desc0 & SDMA_DESC0_LAST_DESC_FLAG) ? 'L' : '-';
  172. trace_seq_printf(p, "%s", flags);
  173. if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
  174. trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
  175. (u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT) &
  176. SDMA_DESC1_HEADER_MODE_MASK),
  177. (u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT) &
  178. SDMA_DESC1_HEADER_INDEX_MASK),
  179. (u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT) &
  180. SDMA_DESC1_HEADER_DWS_MASK));
  181. return ret;
  182. }
  183. const char *print_u32_array(
  184. struct trace_seq *p,
  185. u32 *arr, int len)
  186. {
  187. int i;
  188. const char *ret = trace_seq_buffer_ptr(p);
  189. for (i = 0; i < len ; i++)
  190. trace_seq_printf(p, "%s%#x", i == 0 ? "" : " ", arr[i]);
  191. trace_seq_putc(p, 0);
  192. return ret;
  193. }
  194. __hfi1_trace_fn(PKT);
  195. __hfi1_trace_fn(PROC);
  196. __hfi1_trace_fn(SDMA);
  197. __hfi1_trace_fn(LINKVERB);
  198. __hfi1_trace_fn(DEBUG);
  199. __hfi1_trace_fn(SNOOP);
  200. __hfi1_trace_fn(CNTR);
  201. __hfi1_trace_fn(PIO);
  202. __hfi1_trace_fn(DC8051);
  203. __hfi1_trace_fn(FIRMWARE);
  204. __hfi1_trace_fn(RCVCTRL);
  205. __hfi1_trace_fn(TID);
  206. __hfi1_trace_fn(MMU);
  207. __hfi1_trace_fn(IOCTL);