driver.c 36 KB

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  1. /*
  2. * Copyright(c) 2015, 2016 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include <linux/spinlock.h>
  48. #include <linux/pci.h>
  49. #include <linux/io.h>
  50. #include <linux/delay.h>
  51. #include <linux/netdevice.h>
  52. #include <linux/vmalloc.h>
  53. #include <linux/module.h>
  54. #include <linux/prefetch.h>
  55. #include <rdma/ib_verbs.h>
  56. #include "hfi.h"
  57. #include "trace.h"
  58. #include "qp.h"
  59. #include "sdma.h"
  60. #undef pr_fmt
  61. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  62. /*
  63. * The size has to be longer than this string, so we can append
  64. * board/chip information to it in the initialization code.
  65. */
  66. const char ib_hfi1_version[] = HFI1_DRIVER_VERSION "\n";
  67. DEFINE_SPINLOCK(hfi1_devs_lock);
  68. LIST_HEAD(hfi1_dev_list);
  69. DEFINE_MUTEX(hfi1_mutex); /* general driver use */
  70. unsigned int hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU;
  71. module_param_named(max_mtu, hfi1_max_mtu, uint, S_IRUGO);
  72. MODULE_PARM_DESC(max_mtu, "Set max MTU bytes, default is " __stringify(
  73. HFI1_DEFAULT_MAX_MTU));
  74. unsigned int hfi1_cu = 1;
  75. module_param_named(cu, hfi1_cu, uint, S_IRUGO);
  76. MODULE_PARM_DESC(cu, "Credit return units");
  77. unsigned long hfi1_cap_mask = HFI1_CAP_MASK_DEFAULT;
  78. static int hfi1_caps_set(const char *, const struct kernel_param *);
  79. static int hfi1_caps_get(char *, const struct kernel_param *);
  80. static const struct kernel_param_ops cap_ops = {
  81. .set = hfi1_caps_set,
  82. .get = hfi1_caps_get
  83. };
  84. module_param_cb(cap_mask, &cap_ops, &hfi1_cap_mask, S_IWUSR | S_IRUGO);
  85. MODULE_PARM_DESC(cap_mask, "Bit mask of enabled/disabled HW features");
  86. MODULE_LICENSE("Dual BSD/GPL");
  87. MODULE_DESCRIPTION("Intel Omni-Path Architecture driver");
  88. MODULE_VERSION(HFI1_DRIVER_VERSION);
  89. /*
  90. * MAX_PKT_RCV is the max # if packets processed per receive interrupt.
  91. */
  92. #define MAX_PKT_RECV 64
  93. #define EGR_HEAD_UPDATE_THRESHOLD 16
  94. struct hfi1_ib_stats hfi1_stats;
  95. static int hfi1_caps_set(const char *val, const struct kernel_param *kp)
  96. {
  97. int ret = 0;
  98. unsigned long *cap_mask_ptr = (unsigned long *)kp->arg,
  99. cap_mask = *cap_mask_ptr, value, diff,
  100. write_mask = ((HFI1_CAP_WRITABLE_MASK << HFI1_CAP_USER_SHIFT) |
  101. HFI1_CAP_WRITABLE_MASK);
  102. ret = kstrtoul(val, 0, &value);
  103. if (ret) {
  104. pr_warn("Invalid module parameter value for 'cap_mask'\n");
  105. goto done;
  106. }
  107. /* Get the changed bits (except the locked bit) */
  108. diff = value ^ (cap_mask & ~HFI1_CAP_LOCKED_SMASK);
  109. /* Remove any bits that are not allowed to change after driver load */
  110. if (HFI1_CAP_LOCKED() && (diff & ~write_mask)) {
  111. pr_warn("Ignoring non-writable capability bits %#lx\n",
  112. diff & ~write_mask);
  113. diff &= write_mask;
  114. }
  115. /* Mask off any reserved bits */
  116. diff &= ~HFI1_CAP_RESERVED_MASK;
  117. /* Clear any previously set and changing bits */
  118. cap_mask &= ~diff;
  119. /* Update the bits with the new capability */
  120. cap_mask |= (value & diff);
  121. /* Check for any kernel/user restrictions */
  122. diff = (cap_mask & (HFI1_CAP_MUST_HAVE_KERN << HFI1_CAP_USER_SHIFT)) ^
  123. ((cap_mask & HFI1_CAP_MUST_HAVE_KERN) << HFI1_CAP_USER_SHIFT);
  124. cap_mask &= ~diff;
  125. /* Set the bitmask to the final set */
  126. *cap_mask_ptr = cap_mask;
  127. done:
  128. return ret;
  129. }
  130. static int hfi1_caps_get(char *buffer, const struct kernel_param *kp)
  131. {
  132. unsigned long cap_mask = *(unsigned long *)kp->arg;
  133. cap_mask &= ~HFI1_CAP_LOCKED_SMASK;
  134. cap_mask |= ((cap_mask & HFI1_CAP_K2U) << HFI1_CAP_USER_SHIFT);
  135. return scnprintf(buffer, PAGE_SIZE, "0x%lx", cap_mask);
  136. }
  137. const char *get_unit_name(int unit)
  138. {
  139. static char iname[16];
  140. snprintf(iname, sizeof(iname), DRIVER_NAME "_%u", unit);
  141. return iname;
  142. }
  143. const char *get_card_name(struct rvt_dev_info *rdi)
  144. {
  145. struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi);
  146. struct hfi1_devdata *dd = container_of(ibdev,
  147. struct hfi1_devdata, verbs_dev);
  148. return get_unit_name(dd->unit);
  149. }
  150. struct pci_dev *get_pci_dev(struct rvt_dev_info *rdi)
  151. {
  152. struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi);
  153. struct hfi1_devdata *dd = container_of(ibdev,
  154. struct hfi1_devdata, verbs_dev);
  155. return dd->pcidev;
  156. }
  157. /*
  158. * Return count of units with at least one port ACTIVE.
  159. */
  160. int hfi1_count_active_units(void)
  161. {
  162. struct hfi1_devdata *dd;
  163. struct hfi1_pportdata *ppd;
  164. unsigned long flags;
  165. int pidx, nunits_active = 0;
  166. spin_lock_irqsave(&hfi1_devs_lock, flags);
  167. list_for_each_entry(dd, &hfi1_dev_list, list) {
  168. if (!(dd->flags & HFI1_PRESENT) || !dd->kregbase)
  169. continue;
  170. for (pidx = 0; pidx < dd->num_pports; ++pidx) {
  171. ppd = dd->pport + pidx;
  172. if (ppd->lid && ppd->linkup) {
  173. nunits_active++;
  174. break;
  175. }
  176. }
  177. }
  178. spin_unlock_irqrestore(&hfi1_devs_lock, flags);
  179. return nunits_active;
  180. }
  181. /*
  182. * Return count of all units, optionally return in arguments
  183. * the number of usable (present) units, and the number of
  184. * ports that are up.
  185. */
  186. int hfi1_count_units(int *npresentp, int *nupp)
  187. {
  188. int nunits = 0, npresent = 0, nup = 0;
  189. struct hfi1_devdata *dd;
  190. unsigned long flags;
  191. int pidx;
  192. struct hfi1_pportdata *ppd;
  193. spin_lock_irqsave(&hfi1_devs_lock, flags);
  194. list_for_each_entry(dd, &hfi1_dev_list, list) {
  195. nunits++;
  196. if ((dd->flags & HFI1_PRESENT) && dd->kregbase)
  197. npresent++;
  198. for (pidx = 0; pidx < dd->num_pports; ++pidx) {
  199. ppd = dd->pport + pidx;
  200. if (ppd->lid && ppd->linkup)
  201. nup++;
  202. }
  203. }
  204. spin_unlock_irqrestore(&hfi1_devs_lock, flags);
  205. if (npresentp)
  206. *npresentp = npresent;
  207. if (nupp)
  208. *nupp = nup;
  209. return nunits;
  210. }
  211. /*
  212. * Get address of eager buffer from it's index (allocated in chunks, not
  213. * contiguous).
  214. */
  215. static inline void *get_egrbuf(const struct hfi1_ctxtdata *rcd, u64 rhf,
  216. u8 *update)
  217. {
  218. u32 idx = rhf_egr_index(rhf), offset = rhf_egr_buf_offset(rhf);
  219. *update |= !(idx & (rcd->egrbufs.threshold - 1)) && !offset;
  220. return (void *)(((u64)(rcd->egrbufs.rcvtids[idx].addr)) +
  221. (offset * RCV_BUF_BLOCK_SIZE));
  222. }
  223. /*
  224. * Validate and encode the a given RcvArray Buffer size.
  225. * The function will check whether the given size falls within
  226. * allowed size ranges for the respective type and, optionally,
  227. * return the proper encoding.
  228. */
  229. inline int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encoded)
  230. {
  231. if (unlikely(!PAGE_ALIGNED(size)))
  232. return 0;
  233. if (unlikely(size < MIN_EAGER_BUFFER))
  234. return 0;
  235. if (size >
  236. (type == PT_EAGER ? MAX_EAGER_BUFFER : MAX_EXPECTED_BUFFER))
  237. return 0;
  238. if (encoded)
  239. *encoded = ilog2(size / PAGE_SIZE) + 1;
  240. return 1;
  241. }
  242. static void rcv_hdrerr(struct hfi1_ctxtdata *rcd, struct hfi1_pportdata *ppd,
  243. struct hfi1_packet *packet)
  244. {
  245. struct ib_header *rhdr = packet->hdr;
  246. u32 rte = rhf_rcv_type_err(packet->rhf);
  247. int lnh = be16_to_cpu(rhdr->lrh[0]) & 3;
  248. struct hfi1_ibport *ibp = &ppd->ibport_data;
  249. struct hfi1_devdata *dd = ppd->dd;
  250. struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
  251. if (packet->rhf & (RHF_VCRC_ERR | RHF_ICRC_ERR))
  252. return;
  253. if (packet->rhf & RHF_TID_ERR) {
  254. /* For TIDERR and RC QPs preemptively schedule a NAK */
  255. struct ib_other_headers *ohdr = NULL;
  256. u32 tlen = rhf_pkt_len(packet->rhf); /* in bytes */
  257. u16 lid = be16_to_cpu(rhdr->lrh[1]);
  258. u32 qp_num;
  259. u32 rcv_flags = 0;
  260. /* Sanity check packet */
  261. if (tlen < 24)
  262. goto drop;
  263. /* Check for GRH */
  264. if (lnh == HFI1_LRH_BTH) {
  265. ohdr = &rhdr->u.oth;
  266. } else if (lnh == HFI1_LRH_GRH) {
  267. u32 vtf;
  268. ohdr = &rhdr->u.l.oth;
  269. if (rhdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
  270. goto drop;
  271. vtf = be32_to_cpu(rhdr->u.l.grh.version_tclass_flow);
  272. if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
  273. goto drop;
  274. rcv_flags |= HFI1_HAS_GRH;
  275. } else {
  276. goto drop;
  277. }
  278. /* Get the destination QP number. */
  279. qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
  280. if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
  281. struct rvt_qp *qp;
  282. unsigned long flags;
  283. rcu_read_lock();
  284. qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
  285. if (!qp) {
  286. rcu_read_unlock();
  287. goto drop;
  288. }
  289. /*
  290. * Handle only RC QPs - for other QP types drop error
  291. * packet.
  292. */
  293. spin_lock_irqsave(&qp->r_lock, flags);
  294. /* Check for valid receive state. */
  295. if (!(ib_rvt_state_ops[qp->state] &
  296. RVT_PROCESS_RECV_OK)) {
  297. ibp->rvp.n_pkt_drops++;
  298. }
  299. switch (qp->ibqp.qp_type) {
  300. case IB_QPT_RC:
  301. hfi1_rc_hdrerr(
  302. rcd,
  303. rhdr,
  304. rcv_flags,
  305. qp);
  306. break;
  307. default:
  308. /* For now don't handle any other QP types */
  309. break;
  310. }
  311. spin_unlock_irqrestore(&qp->r_lock, flags);
  312. rcu_read_unlock();
  313. } /* Unicast QP */
  314. } /* Valid packet with TIDErr */
  315. /* handle "RcvTypeErr" flags */
  316. switch (rte) {
  317. case RHF_RTE_ERROR_OP_CODE_ERR:
  318. {
  319. u32 opcode;
  320. void *ebuf = NULL;
  321. __be32 *bth = NULL;
  322. if (rhf_use_egr_bfr(packet->rhf))
  323. ebuf = packet->ebuf;
  324. if (!ebuf)
  325. goto drop; /* this should never happen */
  326. if (lnh == HFI1_LRH_BTH)
  327. bth = (__be32 *)ebuf;
  328. else if (lnh == HFI1_LRH_GRH)
  329. bth = (__be32 *)((char *)ebuf + sizeof(struct ib_grh));
  330. else
  331. goto drop;
  332. opcode = be32_to_cpu(bth[0]) >> 24;
  333. opcode &= 0xff;
  334. if (opcode == IB_OPCODE_CNP) {
  335. /*
  336. * Only in pre-B0 h/w is the CNP_OPCODE handled
  337. * via this code path.
  338. */
  339. struct rvt_qp *qp = NULL;
  340. u32 lqpn, rqpn;
  341. u16 rlid;
  342. u8 svc_type, sl, sc5;
  343. sc5 = hdr2sc(rhdr, packet->rhf);
  344. sl = ibp->sc_to_sl[sc5];
  345. lqpn = be32_to_cpu(bth[1]) & RVT_QPN_MASK;
  346. rcu_read_lock();
  347. qp = rvt_lookup_qpn(rdi, &ibp->rvp, lqpn);
  348. if (!qp) {
  349. rcu_read_unlock();
  350. goto drop;
  351. }
  352. switch (qp->ibqp.qp_type) {
  353. case IB_QPT_UD:
  354. rlid = 0;
  355. rqpn = 0;
  356. svc_type = IB_CC_SVCTYPE_UD;
  357. break;
  358. case IB_QPT_UC:
  359. rlid = be16_to_cpu(rhdr->lrh[3]);
  360. rqpn = qp->remote_qpn;
  361. svc_type = IB_CC_SVCTYPE_UC;
  362. break;
  363. default:
  364. goto drop;
  365. }
  366. process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
  367. rcu_read_unlock();
  368. }
  369. packet->rhf &= ~RHF_RCV_TYPE_ERR_SMASK;
  370. break;
  371. }
  372. default:
  373. break;
  374. }
  375. drop:
  376. return;
  377. }
  378. static inline void init_packet(struct hfi1_ctxtdata *rcd,
  379. struct hfi1_packet *packet)
  380. {
  381. packet->rsize = rcd->rcvhdrqentsize; /* words */
  382. packet->maxcnt = rcd->rcvhdrq_cnt * packet->rsize; /* words */
  383. packet->rcd = rcd;
  384. packet->updegr = 0;
  385. packet->etail = -1;
  386. packet->rhf_addr = get_rhf_addr(rcd);
  387. packet->rhf = rhf_to_cpu(packet->rhf_addr);
  388. packet->rhqoff = rcd->head;
  389. packet->numpkt = 0;
  390. packet->rcv_flags = 0;
  391. }
  392. void hfi1_process_ecn_slowpath(struct rvt_qp *qp, struct hfi1_packet *pkt,
  393. bool do_cnp)
  394. {
  395. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  396. struct ib_header *hdr = pkt->hdr;
  397. struct ib_other_headers *ohdr = pkt->ohdr;
  398. struct ib_grh *grh = NULL;
  399. u32 rqpn = 0, bth1;
  400. u16 rlid, dlid = be16_to_cpu(hdr->lrh[1]);
  401. u8 sc, svc_type;
  402. bool is_mcast = false;
  403. if (pkt->rcv_flags & HFI1_HAS_GRH)
  404. grh = &hdr->u.l.grh;
  405. switch (qp->ibqp.qp_type) {
  406. case IB_QPT_SMI:
  407. case IB_QPT_GSI:
  408. case IB_QPT_UD:
  409. rlid = be16_to_cpu(hdr->lrh[3]);
  410. rqpn = be32_to_cpu(ohdr->u.ud.deth[1]) & RVT_QPN_MASK;
  411. svc_type = IB_CC_SVCTYPE_UD;
  412. is_mcast = (dlid > be16_to_cpu(IB_MULTICAST_LID_BASE)) &&
  413. (dlid != be16_to_cpu(IB_LID_PERMISSIVE));
  414. break;
  415. case IB_QPT_UC:
  416. rlid = qp->remote_ah_attr.dlid;
  417. rqpn = qp->remote_qpn;
  418. svc_type = IB_CC_SVCTYPE_UC;
  419. break;
  420. case IB_QPT_RC:
  421. rlid = qp->remote_ah_attr.dlid;
  422. rqpn = qp->remote_qpn;
  423. svc_type = IB_CC_SVCTYPE_RC;
  424. break;
  425. default:
  426. return;
  427. }
  428. sc = hdr2sc(hdr, pkt->rhf);
  429. bth1 = be32_to_cpu(ohdr->bth[1]);
  430. if (do_cnp && (bth1 & HFI1_FECN_SMASK)) {
  431. u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]);
  432. return_cnp(ibp, qp, rqpn, pkey, dlid, rlid, sc, grh);
  433. }
  434. if (!is_mcast && (bth1 & HFI1_BECN_SMASK)) {
  435. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  436. u32 lqpn = bth1 & RVT_QPN_MASK;
  437. u8 sl = ibp->sc_to_sl[sc];
  438. process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
  439. }
  440. }
  441. struct ps_mdata {
  442. struct hfi1_ctxtdata *rcd;
  443. u32 rsize;
  444. u32 maxcnt;
  445. u32 ps_head;
  446. u32 ps_tail;
  447. u32 ps_seq;
  448. };
  449. static inline void init_ps_mdata(struct ps_mdata *mdata,
  450. struct hfi1_packet *packet)
  451. {
  452. struct hfi1_ctxtdata *rcd = packet->rcd;
  453. mdata->rcd = rcd;
  454. mdata->rsize = packet->rsize;
  455. mdata->maxcnt = packet->maxcnt;
  456. mdata->ps_head = packet->rhqoff;
  457. if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
  458. mdata->ps_tail = get_rcvhdrtail(rcd);
  459. if (rcd->ctxt == HFI1_CTRL_CTXT)
  460. mdata->ps_seq = rcd->seq_cnt;
  461. else
  462. mdata->ps_seq = 0; /* not used with DMA_RTAIL */
  463. } else {
  464. mdata->ps_tail = 0; /* used only with DMA_RTAIL*/
  465. mdata->ps_seq = rcd->seq_cnt;
  466. }
  467. }
  468. static inline int ps_done(struct ps_mdata *mdata, u64 rhf,
  469. struct hfi1_ctxtdata *rcd)
  470. {
  471. if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL))
  472. return mdata->ps_head == mdata->ps_tail;
  473. return mdata->ps_seq != rhf_rcv_seq(rhf);
  474. }
  475. static inline int ps_skip(struct ps_mdata *mdata, u64 rhf,
  476. struct hfi1_ctxtdata *rcd)
  477. {
  478. /*
  479. * Control context can potentially receive an invalid rhf.
  480. * Drop such packets.
  481. */
  482. if ((rcd->ctxt == HFI1_CTRL_CTXT) && (mdata->ps_head != mdata->ps_tail))
  483. return mdata->ps_seq != rhf_rcv_seq(rhf);
  484. return 0;
  485. }
  486. static inline void update_ps_mdata(struct ps_mdata *mdata,
  487. struct hfi1_ctxtdata *rcd)
  488. {
  489. mdata->ps_head += mdata->rsize;
  490. if (mdata->ps_head >= mdata->maxcnt)
  491. mdata->ps_head = 0;
  492. /* Control context must do seq counting */
  493. if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL) ||
  494. (rcd->ctxt == HFI1_CTRL_CTXT)) {
  495. if (++mdata->ps_seq > 13)
  496. mdata->ps_seq = 1;
  497. }
  498. }
  499. /*
  500. * prescan_rxq - search through the receive queue looking for packets
  501. * containing Excplicit Congestion Notifications (FECNs, or BECNs).
  502. * When an ECN is found, process the Congestion Notification, and toggle
  503. * it off.
  504. * This is declared as a macro to allow quick checking of the port to avoid
  505. * the overhead of a function call if not enabled.
  506. */
  507. #define prescan_rxq(rcd, packet) \
  508. do { \
  509. if (rcd->ppd->cc_prescan) \
  510. __prescan_rxq(packet); \
  511. } while (0)
  512. static void __prescan_rxq(struct hfi1_packet *packet)
  513. {
  514. struct hfi1_ctxtdata *rcd = packet->rcd;
  515. struct ps_mdata mdata;
  516. init_ps_mdata(&mdata, packet);
  517. while (1) {
  518. struct hfi1_devdata *dd = rcd->dd;
  519. struct hfi1_ibport *ibp = &rcd->ppd->ibport_data;
  520. __le32 *rhf_addr = (__le32 *)rcd->rcvhdrq + mdata.ps_head +
  521. dd->rhf_offset;
  522. struct rvt_qp *qp;
  523. struct ib_header *hdr;
  524. struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
  525. u64 rhf = rhf_to_cpu(rhf_addr);
  526. u32 etype = rhf_rcv_type(rhf), qpn, bth1;
  527. int is_ecn = 0;
  528. u8 lnh;
  529. if (ps_done(&mdata, rhf, rcd))
  530. break;
  531. if (ps_skip(&mdata, rhf, rcd))
  532. goto next;
  533. if (etype != RHF_RCV_TYPE_IB)
  534. goto next;
  535. packet->hdr = hfi1_get_msgheader(dd, rhf_addr);
  536. hdr = packet->hdr;
  537. lnh = be16_to_cpu(hdr->lrh[0]) & 3;
  538. if (lnh == HFI1_LRH_BTH) {
  539. packet->ohdr = &hdr->u.oth;
  540. } else if (lnh == HFI1_LRH_GRH) {
  541. packet->ohdr = &hdr->u.l.oth;
  542. packet->rcv_flags |= HFI1_HAS_GRH;
  543. } else {
  544. goto next; /* just in case */
  545. }
  546. bth1 = be32_to_cpu(packet->ohdr->bth[1]);
  547. is_ecn = !!(bth1 & (HFI1_FECN_SMASK | HFI1_BECN_SMASK));
  548. if (!is_ecn)
  549. goto next;
  550. qpn = bth1 & RVT_QPN_MASK;
  551. rcu_read_lock();
  552. qp = rvt_lookup_qpn(rdi, &ibp->rvp, qpn);
  553. if (!qp) {
  554. rcu_read_unlock();
  555. goto next;
  556. }
  557. process_ecn(qp, packet, true);
  558. rcu_read_unlock();
  559. /* turn off BECN, FECN */
  560. bth1 &= ~(HFI1_FECN_SMASK | HFI1_BECN_SMASK);
  561. packet->ohdr->bth[1] = cpu_to_be32(bth1);
  562. next:
  563. update_ps_mdata(&mdata, rcd);
  564. }
  565. }
  566. static inline int skip_rcv_packet(struct hfi1_packet *packet, int thread)
  567. {
  568. int ret = RCV_PKT_OK;
  569. /* Set up for the next packet */
  570. packet->rhqoff += packet->rsize;
  571. if (packet->rhqoff >= packet->maxcnt)
  572. packet->rhqoff = 0;
  573. packet->numpkt++;
  574. if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
  575. if (thread) {
  576. cond_resched();
  577. } else {
  578. ret = RCV_PKT_LIMIT;
  579. this_cpu_inc(*packet->rcd->dd->rcv_limit);
  580. }
  581. }
  582. packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff +
  583. packet->rcd->dd->rhf_offset;
  584. packet->rhf = rhf_to_cpu(packet->rhf_addr);
  585. return ret;
  586. }
  587. static inline int process_rcv_packet(struct hfi1_packet *packet, int thread)
  588. {
  589. int ret = RCV_PKT_OK;
  590. packet->hdr = hfi1_get_msgheader(packet->rcd->dd,
  591. packet->rhf_addr);
  592. packet->hlen = (u8 *)packet->rhf_addr - (u8 *)packet->hdr;
  593. packet->etype = rhf_rcv_type(packet->rhf);
  594. /* total length */
  595. packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */
  596. /* retrieve eager buffer details */
  597. packet->ebuf = NULL;
  598. if (rhf_use_egr_bfr(packet->rhf)) {
  599. packet->etail = rhf_egr_index(packet->rhf);
  600. packet->ebuf = get_egrbuf(packet->rcd, packet->rhf,
  601. &packet->updegr);
  602. /*
  603. * Prefetch the contents of the eager buffer. It is
  604. * OK to send a negative length to prefetch_range().
  605. * The +2 is the size of the RHF.
  606. */
  607. prefetch_range(packet->ebuf,
  608. packet->tlen - ((packet->rcd->rcvhdrqentsize -
  609. (rhf_hdrq_offset(packet->rhf)
  610. + 2)) * 4));
  611. }
  612. /*
  613. * Call a type specific handler for the packet. We
  614. * should be able to trust that etype won't be beyond
  615. * the range of valid indexes. If so something is really
  616. * wrong and we can probably just let things come
  617. * crashing down. There is no need to eat another
  618. * comparison in this performance critical code.
  619. */
  620. packet->rcd->dd->rhf_rcv_function_map[packet->etype](packet);
  621. packet->numpkt++;
  622. /* Set up for the next packet */
  623. packet->rhqoff += packet->rsize;
  624. if (packet->rhqoff >= packet->maxcnt)
  625. packet->rhqoff = 0;
  626. if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
  627. if (thread) {
  628. cond_resched();
  629. } else {
  630. ret = RCV_PKT_LIMIT;
  631. this_cpu_inc(*packet->rcd->dd->rcv_limit);
  632. }
  633. }
  634. packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff +
  635. packet->rcd->dd->rhf_offset;
  636. packet->rhf = rhf_to_cpu(packet->rhf_addr);
  637. return ret;
  638. }
  639. static inline void process_rcv_update(int last, struct hfi1_packet *packet)
  640. {
  641. /*
  642. * Update head regs etc., every 16 packets, if not last pkt,
  643. * to help prevent rcvhdrq overflows, when many packets
  644. * are processed and queue is nearly full.
  645. * Don't request an interrupt for intermediate updates.
  646. */
  647. if (!last && !(packet->numpkt & 0xf)) {
  648. update_usrhead(packet->rcd, packet->rhqoff, packet->updegr,
  649. packet->etail, 0, 0);
  650. packet->updegr = 0;
  651. }
  652. packet->rcv_flags = 0;
  653. }
  654. static inline void finish_packet(struct hfi1_packet *packet)
  655. {
  656. /*
  657. * Nothing we need to free for the packet.
  658. *
  659. * The only thing we need to do is a final update and call for an
  660. * interrupt
  661. */
  662. update_usrhead(packet->rcd, packet->rcd->head, packet->updegr,
  663. packet->etail, rcv_intr_dynamic, packet->numpkt);
  664. }
  665. static inline void process_rcv_qp_work(struct hfi1_packet *packet)
  666. {
  667. struct hfi1_ctxtdata *rcd;
  668. struct rvt_qp *qp, *nqp;
  669. rcd = packet->rcd;
  670. rcd->head = packet->rhqoff;
  671. /*
  672. * Iterate over all QPs waiting to respond.
  673. * The list won't change since the IRQ is only run on one CPU.
  674. */
  675. list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
  676. list_del_init(&qp->rspwait);
  677. if (qp->r_flags & RVT_R_RSP_NAK) {
  678. qp->r_flags &= ~RVT_R_RSP_NAK;
  679. hfi1_send_rc_ack(rcd, qp, 0);
  680. }
  681. if (qp->r_flags & RVT_R_RSP_SEND) {
  682. unsigned long flags;
  683. qp->r_flags &= ~RVT_R_RSP_SEND;
  684. spin_lock_irqsave(&qp->s_lock, flags);
  685. if (ib_rvt_state_ops[qp->state] &
  686. RVT_PROCESS_OR_FLUSH_SEND)
  687. hfi1_schedule_send(qp);
  688. spin_unlock_irqrestore(&qp->s_lock, flags);
  689. }
  690. if (atomic_dec_and_test(&qp->refcount))
  691. wake_up(&qp->wait);
  692. }
  693. }
  694. /*
  695. * Handle receive interrupts when using the no dma rtail option.
  696. */
  697. int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *rcd, int thread)
  698. {
  699. u32 seq;
  700. int last = RCV_PKT_OK;
  701. struct hfi1_packet packet;
  702. init_packet(rcd, &packet);
  703. seq = rhf_rcv_seq(packet.rhf);
  704. if (seq != rcd->seq_cnt) {
  705. last = RCV_PKT_DONE;
  706. goto bail;
  707. }
  708. prescan_rxq(rcd, &packet);
  709. while (last == RCV_PKT_OK) {
  710. last = process_rcv_packet(&packet, thread);
  711. seq = rhf_rcv_seq(packet.rhf);
  712. if (++rcd->seq_cnt > 13)
  713. rcd->seq_cnt = 1;
  714. if (seq != rcd->seq_cnt)
  715. last = RCV_PKT_DONE;
  716. process_rcv_update(last, &packet);
  717. }
  718. process_rcv_qp_work(&packet);
  719. bail:
  720. finish_packet(&packet);
  721. return last;
  722. }
  723. int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *rcd, int thread)
  724. {
  725. u32 hdrqtail;
  726. int last = RCV_PKT_OK;
  727. struct hfi1_packet packet;
  728. init_packet(rcd, &packet);
  729. hdrqtail = get_rcvhdrtail(rcd);
  730. if (packet.rhqoff == hdrqtail) {
  731. last = RCV_PKT_DONE;
  732. goto bail;
  733. }
  734. smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
  735. prescan_rxq(rcd, &packet);
  736. while (last == RCV_PKT_OK) {
  737. last = process_rcv_packet(&packet, thread);
  738. if (packet.rhqoff == hdrqtail)
  739. last = RCV_PKT_DONE;
  740. process_rcv_update(last, &packet);
  741. }
  742. process_rcv_qp_work(&packet);
  743. bail:
  744. finish_packet(&packet);
  745. return last;
  746. }
  747. static inline void set_all_nodma_rtail(struct hfi1_devdata *dd)
  748. {
  749. int i;
  750. for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
  751. dd->rcd[i]->do_interrupt =
  752. &handle_receive_interrupt_nodma_rtail;
  753. }
  754. static inline void set_all_dma_rtail(struct hfi1_devdata *dd)
  755. {
  756. int i;
  757. for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
  758. dd->rcd[i]->do_interrupt =
  759. &handle_receive_interrupt_dma_rtail;
  760. }
  761. void set_all_slowpath(struct hfi1_devdata *dd)
  762. {
  763. int i;
  764. /* HFI1_CTRL_CTXT must always use the slow path interrupt handler */
  765. for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
  766. dd->rcd[i]->do_interrupt = &handle_receive_interrupt;
  767. }
  768. static inline int set_armed_to_active(struct hfi1_ctxtdata *rcd,
  769. struct hfi1_packet *packet,
  770. struct hfi1_devdata *dd)
  771. {
  772. struct work_struct *lsaw = &rcd->ppd->linkstate_active_work;
  773. struct ib_header *hdr = hfi1_get_msgheader(packet->rcd->dd,
  774. packet->rhf_addr);
  775. u8 etype = rhf_rcv_type(packet->rhf);
  776. if (etype == RHF_RCV_TYPE_IB && hdr2sc(hdr, packet->rhf) != 0xf) {
  777. int hwstate = read_logical_state(dd);
  778. if (hwstate != LSTATE_ACTIVE) {
  779. dd_dev_info(dd, "Unexpected link state %d\n", hwstate);
  780. return 0;
  781. }
  782. queue_work(rcd->ppd->hfi1_wq, lsaw);
  783. return 1;
  784. }
  785. return 0;
  786. }
  787. /*
  788. * handle_receive_interrupt - receive a packet
  789. * @rcd: the context
  790. *
  791. * Called from interrupt handler for errors or receive interrupt.
  792. * This is the slow path interrupt handler.
  793. */
  794. int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
  795. {
  796. struct hfi1_devdata *dd = rcd->dd;
  797. u32 hdrqtail;
  798. int needset, last = RCV_PKT_OK;
  799. struct hfi1_packet packet;
  800. int skip_pkt = 0;
  801. /* Control context will always use the slow path interrupt handler */
  802. needset = (rcd->ctxt == HFI1_CTRL_CTXT) ? 0 : 1;
  803. init_packet(rcd, &packet);
  804. if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
  805. u32 seq = rhf_rcv_seq(packet.rhf);
  806. if (seq != rcd->seq_cnt) {
  807. last = RCV_PKT_DONE;
  808. goto bail;
  809. }
  810. hdrqtail = 0;
  811. } else {
  812. hdrqtail = get_rcvhdrtail(rcd);
  813. if (packet.rhqoff == hdrqtail) {
  814. last = RCV_PKT_DONE;
  815. goto bail;
  816. }
  817. smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
  818. /*
  819. * Control context can potentially receive an invalid
  820. * rhf. Drop such packets.
  821. */
  822. if (rcd->ctxt == HFI1_CTRL_CTXT) {
  823. u32 seq = rhf_rcv_seq(packet.rhf);
  824. if (seq != rcd->seq_cnt)
  825. skip_pkt = 1;
  826. }
  827. }
  828. prescan_rxq(rcd, &packet);
  829. while (last == RCV_PKT_OK) {
  830. if (unlikely(dd->do_drop &&
  831. atomic_xchg(&dd->drop_packet, DROP_PACKET_OFF) ==
  832. DROP_PACKET_ON)) {
  833. dd->do_drop = 0;
  834. /* On to the next packet */
  835. packet.rhqoff += packet.rsize;
  836. packet.rhf_addr = (__le32 *)rcd->rcvhdrq +
  837. packet.rhqoff +
  838. dd->rhf_offset;
  839. packet.rhf = rhf_to_cpu(packet.rhf_addr);
  840. } else if (skip_pkt) {
  841. last = skip_rcv_packet(&packet, thread);
  842. skip_pkt = 0;
  843. } else {
  844. /* Auto activate link on non-SC15 packet receive */
  845. if (unlikely(rcd->ppd->host_link_state ==
  846. HLS_UP_ARMED) &&
  847. set_armed_to_active(rcd, &packet, dd))
  848. goto bail;
  849. last = process_rcv_packet(&packet, thread);
  850. }
  851. if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
  852. u32 seq = rhf_rcv_seq(packet.rhf);
  853. if (++rcd->seq_cnt > 13)
  854. rcd->seq_cnt = 1;
  855. if (seq != rcd->seq_cnt)
  856. last = RCV_PKT_DONE;
  857. if (needset) {
  858. dd_dev_info(dd, "Switching to NO_DMA_RTAIL\n");
  859. set_all_nodma_rtail(dd);
  860. needset = 0;
  861. }
  862. } else {
  863. if (packet.rhqoff == hdrqtail)
  864. last = RCV_PKT_DONE;
  865. /*
  866. * Control context can potentially receive an invalid
  867. * rhf. Drop such packets.
  868. */
  869. if (rcd->ctxt == HFI1_CTRL_CTXT) {
  870. u32 seq = rhf_rcv_seq(packet.rhf);
  871. if (++rcd->seq_cnt > 13)
  872. rcd->seq_cnt = 1;
  873. if (!last && (seq != rcd->seq_cnt))
  874. skip_pkt = 1;
  875. }
  876. if (needset) {
  877. dd_dev_info(dd,
  878. "Switching to DMA_RTAIL\n");
  879. set_all_dma_rtail(dd);
  880. needset = 0;
  881. }
  882. }
  883. process_rcv_update(last, &packet);
  884. }
  885. process_rcv_qp_work(&packet);
  886. bail:
  887. /*
  888. * Always write head at end, and setup rcv interrupt, even
  889. * if no packets were processed.
  890. */
  891. finish_packet(&packet);
  892. return last;
  893. }
  894. /*
  895. * We may discover in the interrupt that the hardware link state has
  896. * changed from ARMED to ACTIVE (due to the arrival of a non-SC15 packet),
  897. * and we need to update the driver's notion of the link state. We cannot
  898. * run set_link_state from interrupt context, so we queue this function on
  899. * a workqueue.
  900. *
  901. * We delay the regular interrupt processing until after the state changes
  902. * so that the link will be in the correct state by the time any application
  903. * we wake up attempts to send a reply to any message it received.
  904. * (Subsequent receive interrupts may possibly force the wakeup before we
  905. * update the link state.)
  906. *
  907. * The rcd is freed in hfi1_free_ctxtdata after hfi1_postinit_cleanup invokes
  908. * dd->f_cleanup(dd) to disable the interrupt handler and flush workqueues,
  909. * so we're safe from use-after-free of the rcd.
  910. */
  911. void receive_interrupt_work(struct work_struct *work)
  912. {
  913. struct hfi1_pportdata *ppd = container_of(work, struct hfi1_pportdata,
  914. linkstate_active_work);
  915. struct hfi1_devdata *dd = ppd->dd;
  916. int i;
  917. /* Received non-SC15 packet implies neighbor_normal */
  918. ppd->neighbor_normal = 1;
  919. set_link_state(ppd, HLS_UP_ACTIVE);
  920. /*
  921. * Interrupt all kernel contexts that could have had an
  922. * interrupt during auto activation.
  923. */
  924. for (i = HFI1_CTRL_CTXT; i < dd->first_user_ctxt; i++)
  925. force_recv_intr(dd->rcd[i]);
  926. }
  927. /*
  928. * Convert a given MTU size to the on-wire MAD packet enumeration.
  929. * Return -1 if the size is invalid.
  930. */
  931. int mtu_to_enum(u32 mtu, int default_if_bad)
  932. {
  933. switch (mtu) {
  934. case 0: return OPA_MTU_0;
  935. case 256: return OPA_MTU_256;
  936. case 512: return OPA_MTU_512;
  937. case 1024: return OPA_MTU_1024;
  938. case 2048: return OPA_MTU_2048;
  939. case 4096: return OPA_MTU_4096;
  940. case 8192: return OPA_MTU_8192;
  941. case 10240: return OPA_MTU_10240;
  942. }
  943. return default_if_bad;
  944. }
  945. u16 enum_to_mtu(int mtu)
  946. {
  947. switch (mtu) {
  948. case OPA_MTU_0: return 0;
  949. case OPA_MTU_256: return 256;
  950. case OPA_MTU_512: return 512;
  951. case OPA_MTU_1024: return 1024;
  952. case OPA_MTU_2048: return 2048;
  953. case OPA_MTU_4096: return 4096;
  954. case OPA_MTU_8192: return 8192;
  955. case OPA_MTU_10240: return 10240;
  956. default: return 0xffff;
  957. }
  958. }
  959. /*
  960. * set_mtu - set the MTU
  961. * @ppd: the per port data
  962. *
  963. * We can handle "any" incoming size, the issue here is whether we
  964. * need to restrict our outgoing size. We do not deal with what happens
  965. * to programs that are already running when the size changes.
  966. */
  967. int set_mtu(struct hfi1_pportdata *ppd)
  968. {
  969. struct hfi1_devdata *dd = ppd->dd;
  970. int i, drain, ret = 0, is_up = 0;
  971. ppd->ibmtu = 0;
  972. for (i = 0; i < ppd->vls_supported; i++)
  973. if (ppd->ibmtu < dd->vld[i].mtu)
  974. ppd->ibmtu = dd->vld[i].mtu;
  975. ppd->ibmaxlen = ppd->ibmtu + lrh_max_header_bytes(ppd->dd);
  976. mutex_lock(&ppd->hls_lock);
  977. if (ppd->host_link_state == HLS_UP_INIT ||
  978. ppd->host_link_state == HLS_UP_ARMED ||
  979. ppd->host_link_state == HLS_UP_ACTIVE)
  980. is_up = 1;
  981. drain = !is_ax(dd) && is_up;
  982. if (drain)
  983. /*
  984. * MTU is specified per-VL. To ensure that no packet gets
  985. * stuck (due, e.g., to the MTU for the packet's VL being
  986. * reduced), empty the per-VL FIFOs before adjusting MTU.
  987. */
  988. ret = stop_drain_data_vls(dd);
  989. if (ret) {
  990. dd_dev_err(dd, "%s: cannot stop/drain VLs - refusing to change per-VL MTUs\n",
  991. __func__);
  992. goto err;
  993. }
  994. hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_MTU, 0);
  995. if (drain)
  996. open_fill_data_vls(dd); /* reopen all VLs */
  997. err:
  998. mutex_unlock(&ppd->hls_lock);
  999. return ret;
  1000. }
  1001. int hfi1_set_lid(struct hfi1_pportdata *ppd, u32 lid, u8 lmc)
  1002. {
  1003. struct hfi1_devdata *dd = ppd->dd;
  1004. ppd->lid = lid;
  1005. ppd->lmc = lmc;
  1006. hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LIDLMC, 0);
  1007. dd_dev_info(dd, "port %u: got a lid: 0x%x\n", ppd->port, lid);
  1008. return 0;
  1009. }
  1010. void shutdown_led_override(struct hfi1_pportdata *ppd)
  1011. {
  1012. struct hfi1_devdata *dd = ppd->dd;
  1013. /*
  1014. * This pairs with the memory barrier in hfi1_start_led_override to
  1015. * ensure that we read the correct state of LED beaconing represented
  1016. * by led_override_timer_active
  1017. */
  1018. smp_rmb();
  1019. if (atomic_read(&ppd->led_override_timer_active)) {
  1020. del_timer_sync(&ppd->led_override_timer);
  1021. atomic_set(&ppd->led_override_timer_active, 0);
  1022. /* Ensure the atomic_set is visible to all CPUs */
  1023. smp_wmb();
  1024. }
  1025. /* Hand control of the LED to the DC for normal operation */
  1026. write_csr(dd, DCC_CFG_LED_CNTRL, 0);
  1027. }
  1028. static void run_led_override(unsigned long opaque)
  1029. {
  1030. struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)opaque;
  1031. struct hfi1_devdata *dd = ppd->dd;
  1032. unsigned long timeout;
  1033. int phase_idx;
  1034. if (!(dd->flags & HFI1_INITTED))
  1035. return;
  1036. phase_idx = ppd->led_override_phase & 1;
  1037. setextled(dd, phase_idx);
  1038. timeout = ppd->led_override_vals[phase_idx];
  1039. /* Set up for next phase */
  1040. ppd->led_override_phase = !ppd->led_override_phase;
  1041. mod_timer(&ppd->led_override_timer, jiffies + timeout);
  1042. }
  1043. /*
  1044. * To have the LED blink in a particular pattern, provide timeon and timeoff
  1045. * in milliseconds.
  1046. * To turn off custom blinking and return to normal operation, use
  1047. * shutdown_led_override()
  1048. */
  1049. void hfi1_start_led_override(struct hfi1_pportdata *ppd, unsigned int timeon,
  1050. unsigned int timeoff)
  1051. {
  1052. if (!(ppd->dd->flags & HFI1_INITTED))
  1053. return;
  1054. /* Convert to jiffies for direct use in timer */
  1055. ppd->led_override_vals[0] = msecs_to_jiffies(timeoff);
  1056. ppd->led_override_vals[1] = msecs_to_jiffies(timeon);
  1057. /* Arbitrarily start from LED on phase */
  1058. ppd->led_override_phase = 1;
  1059. /*
  1060. * If the timer has not already been started, do so. Use a "quick"
  1061. * timeout so the handler will be called soon to look at our request.
  1062. */
  1063. if (!timer_pending(&ppd->led_override_timer)) {
  1064. setup_timer(&ppd->led_override_timer, run_led_override,
  1065. (unsigned long)ppd);
  1066. ppd->led_override_timer.expires = jiffies + 1;
  1067. add_timer(&ppd->led_override_timer);
  1068. atomic_set(&ppd->led_override_timer_active, 1);
  1069. /* Ensure the atomic_set is visible to all CPUs */
  1070. smp_wmb();
  1071. }
  1072. }
  1073. /**
  1074. * hfi1_reset_device - reset the chip if possible
  1075. * @unit: the device to reset
  1076. *
  1077. * Whether or not reset is successful, we attempt to re-initialize the chip
  1078. * (that is, much like a driver unload/reload). We clear the INITTED flag
  1079. * so that the various entry points will fail until we reinitialize. For
  1080. * now, we only allow this if no user contexts are open that use chip resources
  1081. */
  1082. int hfi1_reset_device(int unit)
  1083. {
  1084. int ret, i;
  1085. struct hfi1_devdata *dd = hfi1_lookup(unit);
  1086. struct hfi1_pportdata *ppd;
  1087. unsigned long flags;
  1088. int pidx;
  1089. if (!dd) {
  1090. ret = -ENODEV;
  1091. goto bail;
  1092. }
  1093. dd_dev_info(dd, "Reset on unit %u requested\n", unit);
  1094. if (!dd->kregbase || !(dd->flags & HFI1_PRESENT)) {
  1095. dd_dev_info(dd,
  1096. "Invalid unit number %u or not initialized or not present\n",
  1097. unit);
  1098. ret = -ENXIO;
  1099. goto bail;
  1100. }
  1101. spin_lock_irqsave(&dd->uctxt_lock, flags);
  1102. if (dd->rcd)
  1103. for (i = dd->first_user_ctxt; i < dd->num_rcv_contexts; i++) {
  1104. if (!dd->rcd[i] || !dd->rcd[i]->cnt)
  1105. continue;
  1106. spin_unlock_irqrestore(&dd->uctxt_lock, flags);
  1107. ret = -EBUSY;
  1108. goto bail;
  1109. }
  1110. spin_unlock_irqrestore(&dd->uctxt_lock, flags);
  1111. for (pidx = 0; pidx < dd->num_pports; ++pidx) {
  1112. ppd = dd->pport + pidx;
  1113. shutdown_led_override(ppd);
  1114. }
  1115. if (dd->flags & HFI1_HAS_SEND_DMA)
  1116. sdma_exit(dd);
  1117. hfi1_reset_cpu_counters(dd);
  1118. ret = hfi1_init(dd, 1);
  1119. if (ret)
  1120. dd_dev_err(dd,
  1121. "Reinitialize unit %u after reset failed with %d\n",
  1122. unit, ret);
  1123. else
  1124. dd_dev_info(dd, "Reinitialized unit %u after resetting\n",
  1125. unit);
  1126. bail:
  1127. return ret;
  1128. }
  1129. void handle_eflags(struct hfi1_packet *packet)
  1130. {
  1131. struct hfi1_ctxtdata *rcd = packet->rcd;
  1132. u32 rte = rhf_rcv_type_err(packet->rhf);
  1133. rcv_hdrerr(rcd, rcd->ppd, packet);
  1134. if (rhf_err_flags(packet->rhf))
  1135. dd_dev_err(rcd->dd,
  1136. "receive context %d: rhf 0x%016llx, errs [ %s%s%s%s%s%s%s%s] rte 0x%x\n",
  1137. rcd->ctxt, packet->rhf,
  1138. packet->rhf & RHF_K_HDR_LEN_ERR ? "k_hdr_len " : "",
  1139. packet->rhf & RHF_DC_UNC_ERR ? "dc_unc " : "",
  1140. packet->rhf & RHF_DC_ERR ? "dc " : "",
  1141. packet->rhf & RHF_TID_ERR ? "tid " : "",
  1142. packet->rhf & RHF_LEN_ERR ? "len " : "",
  1143. packet->rhf & RHF_ECC_ERR ? "ecc " : "",
  1144. packet->rhf & RHF_VCRC_ERR ? "vcrc " : "",
  1145. packet->rhf & RHF_ICRC_ERR ? "icrc " : "",
  1146. rte);
  1147. }
  1148. /*
  1149. * The following functions are called by the interrupt handler. They are type
  1150. * specific handlers for each packet type.
  1151. */
  1152. int process_receive_ib(struct hfi1_packet *packet)
  1153. {
  1154. trace_hfi1_rcvhdr(packet->rcd->ppd->dd,
  1155. packet->rcd->ctxt,
  1156. rhf_err_flags(packet->rhf),
  1157. RHF_RCV_TYPE_IB,
  1158. packet->hlen,
  1159. packet->tlen,
  1160. packet->updegr,
  1161. rhf_egr_index(packet->rhf));
  1162. if (unlikely(rhf_err_flags(packet->rhf))) {
  1163. handle_eflags(packet);
  1164. return RHF_RCV_CONTINUE;
  1165. }
  1166. hfi1_ib_rcv(packet);
  1167. return RHF_RCV_CONTINUE;
  1168. }
  1169. int process_receive_bypass(struct hfi1_packet *packet)
  1170. {
  1171. struct hfi1_devdata *dd = packet->rcd->dd;
  1172. if (unlikely(rhf_err_flags(packet->rhf)))
  1173. handle_eflags(packet);
  1174. dd_dev_err(dd,
  1175. "Bypass packets are not supported in normal operation. Dropping\n");
  1176. incr_cntr64(&dd->sw_rcv_bypass_packet_errors);
  1177. if (!(dd->err_info_rcvport.status_and_code & OPA_EI_STATUS_SMASK)) {
  1178. u64 *flits = packet->ebuf;
  1179. if (flits && !(packet->rhf & RHF_LEN_ERR)) {
  1180. dd->err_info_rcvport.packet_flit1 = flits[0];
  1181. dd->err_info_rcvport.packet_flit2 =
  1182. packet->tlen > sizeof(flits[0]) ? flits[1] : 0;
  1183. }
  1184. dd->err_info_rcvport.status_and_code |=
  1185. (OPA_EI_STATUS_SMASK | BAD_L2_ERR);
  1186. }
  1187. return RHF_RCV_CONTINUE;
  1188. }
  1189. int process_receive_error(struct hfi1_packet *packet)
  1190. {
  1191. handle_eflags(packet);
  1192. if (unlikely(rhf_err_flags(packet->rhf)))
  1193. dd_dev_err(packet->rcd->dd,
  1194. "Unhandled error packet received. Dropping.\n");
  1195. return RHF_RCV_CONTINUE;
  1196. }
  1197. int kdeth_process_expected(struct hfi1_packet *packet)
  1198. {
  1199. if (unlikely(rhf_err_flags(packet->rhf)))
  1200. handle_eflags(packet);
  1201. dd_dev_err(packet->rcd->dd,
  1202. "Unhandled expected packet received. Dropping.\n");
  1203. return RHF_RCV_CONTINUE;
  1204. }
  1205. int kdeth_process_eager(struct hfi1_packet *packet)
  1206. {
  1207. if (unlikely(rhf_err_flags(packet->rhf)))
  1208. handle_eflags(packet);
  1209. dd_dev_err(packet->rcd->dd,
  1210. "Unhandled eager packet received. Dropping.\n");
  1211. return RHF_RCV_CONTINUE;
  1212. }
  1213. int process_receive_invalid(struct hfi1_packet *packet)
  1214. {
  1215. dd_dev_err(packet->rcd->dd, "Invalid packet type %d. Dropping\n",
  1216. rhf_rcv_type(packet->rhf));
  1217. return RHF_RCV_CONTINUE;
  1218. }