chcr_algo.c 44 KB

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  1. /*
  2. * This file is part of the Chelsio T6 Crypto driver for Linux.
  3. *
  4. * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. *
  34. * Written and Maintained by:
  35. * Manoj Malviya (manojmalviya@chelsio.com)
  36. * Atul Gupta (atul.gupta@chelsio.com)
  37. * Jitendra Lulla (jlulla@chelsio.com)
  38. * Yeshaswi M R Gowda (yeshaswi@chelsio.com)
  39. * Harsh Jain (harsh@chelsio.com)
  40. */
  41. #define pr_fmt(fmt) "chcr:" fmt
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/crypto.h>
  45. #include <linux/cryptohash.h>
  46. #include <linux/skbuff.h>
  47. #include <linux/rtnetlink.h>
  48. #include <linux/highmem.h>
  49. #include <linux/scatterlist.h>
  50. #include <crypto/aes.h>
  51. #include <crypto/algapi.h>
  52. #include <crypto/hash.h>
  53. #include <crypto/sha.h>
  54. #include <crypto/internal/hash.h>
  55. #include "t4fw_api.h"
  56. #include "t4_msg.h"
  57. #include "chcr_core.h"
  58. #include "chcr_algo.h"
  59. #include "chcr_crypto.h"
  60. static inline struct ablk_ctx *ABLK_CTX(struct chcr_context *ctx)
  61. {
  62. return ctx->crypto_ctx->ablkctx;
  63. }
  64. static inline struct hmac_ctx *HMAC_CTX(struct chcr_context *ctx)
  65. {
  66. return ctx->crypto_ctx->hmacctx;
  67. }
  68. static inline struct uld_ctx *ULD_CTX(struct chcr_context *ctx)
  69. {
  70. return ctx->dev->u_ctx;
  71. }
  72. static inline int is_ofld_imm(const struct sk_buff *skb)
  73. {
  74. return (skb->len <= CRYPTO_MAX_IMM_TX_PKT_LEN);
  75. }
  76. /*
  77. * sgl_len - calculates the size of an SGL of the given capacity
  78. * @n: the number of SGL entries
  79. * Calculates the number of flits needed for a scatter/gather list that
  80. * can hold the given number of entries.
  81. */
  82. static inline unsigned int sgl_len(unsigned int n)
  83. {
  84. n--;
  85. return (3 * n) / 2 + (n & 1) + 2;
  86. }
  87. /*
  88. * chcr_handle_resp - Unmap the DMA buffers associated with the request
  89. * @req: crypto request
  90. */
  91. int chcr_handle_resp(struct crypto_async_request *req, unsigned char *input,
  92. int error_status)
  93. {
  94. struct crypto_tfm *tfm = req->tfm;
  95. struct chcr_context *ctx = crypto_tfm_ctx(tfm);
  96. struct uld_ctx *u_ctx = ULD_CTX(ctx);
  97. struct chcr_req_ctx ctx_req;
  98. struct cpl_fw6_pld *fw6_pld;
  99. unsigned int digestsize, updated_digestsize;
  100. switch (tfm->__crt_alg->cra_flags & CRYPTO_ALG_TYPE_MASK) {
  101. case CRYPTO_ALG_TYPE_BLKCIPHER:
  102. ctx_req.req.ablk_req = (struct ablkcipher_request *)req;
  103. ctx_req.ctx.ablk_ctx =
  104. ablkcipher_request_ctx(ctx_req.req.ablk_req);
  105. if (!error_status) {
  106. fw6_pld = (struct cpl_fw6_pld *)input;
  107. memcpy(ctx_req.req.ablk_req->info, &fw6_pld->data[2],
  108. AES_BLOCK_SIZE);
  109. }
  110. dma_unmap_sg(&u_ctx->lldi.pdev->dev, ctx_req.req.ablk_req->dst,
  111. ABLK_CTX(ctx)->dst_nents, DMA_FROM_DEVICE);
  112. if (ctx_req.ctx.ablk_ctx->skb) {
  113. kfree_skb(ctx_req.ctx.ablk_ctx->skb);
  114. ctx_req.ctx.ablk_ctx->skb = NULL;
  115. }
  116. break;
  117. case CRYPTO_ALG_TYPE_AHASH:
  118. ctx_req.req.ahash_req = (struct ahash_request *)req;
  119. ctx_req.ctx.ahash_ctx =
  120. ahash_request_ctx(ctx_req.req.ahash_req);
  121. digestsize =
  122. crypto_ahash_digestsize(crypto_ahash_reqtfm(
  123. ctx_req.req.ahash_req));
  124. updated_digestsize = digestsize;
  125. if (digestsize == SHA224_DIGEST_SIZE)
  126. updated_digestsize = SHA256_DIGEST_SIZE;
  127. else if (digestsize == SHA384_DIGEST_SIZE)
  128. updated_digestsize = SHA512_DIGEST_SIZE;
  129. if (ctx_req.ctx.ahash_ctx->skb)
  130. ctx_req.ctx.ahash_ctx->skb = NULL;
  131. if (ctx_req.ctx.ahash_ctx->result == 1) {
  132. ctx_req.ctx.ahash_ctx->result = 0;
  133. memcpy(ctx_req.req.ahash_req->result, input +
  134. sizeof(struct cpl_fw6_pld),
  135. digestsize);
  136. } else {
  137. memcpy(ctx_req.ctx.ahash_ctx->partial_hash, input +
  138. sizeof(struct cpl_fw6_pld),
  139. updated_digestsize);
  140. }
  141. kfree(ctx_req.ctx.ahash_ctx->dummy_payload_ptr);
  142. ctx_req.ctx.ahash_ctx->dummy_payload_ptr = NULL;
  143. break;
  144. }
  145. return 0;
  146. }
  147. /*
  148. * calc_tx_flits_ofld - calculate # of flits for an offload packet
  149. * @skb: the packet
  150. * Returns the number of flits needed for the given offload packet.
  151. * These packets are already fully constructed and no additional headers
  152. * will be added.
  153. */
  154. static inline unsigned int calc_tx_flits_ofld(const struct sk_buff *skb)
  155. {
  156. unsigned int flits, cnt;
  157. if (is_ofld_imm(skb))
  158. return DIV_ROUND_UP(skb->len, 8);
  159. flits = skb_transport_offset(skb) / 8; /* headers */
  160. cnt = skb_shinfo(skb)->nr_frags;
  161. if (skb_tail_pointer(skb) != skb_transport_header(skb))
  162. cnt++;
  163. return flits + sgl_len(cnt);
  164. }
  165. static struct shash_desc *chcr_alloc_shash(unsigned int ds)
  166. {
  167. struct crypto_shash *base_hash = NULL;
  168. struct shash_desc *desc;
  169. switch (ds) {
  170. case SHA1_DIGEST_SIZE:
  171. base_hash = crypto_alloc_shash("sha1-generic", 0, 0);
  172. break;
  173. case SHA224_DIGEST_SIZE:
  174. base_hash = crypto_alloc_shash("sha224-generic", 0, 0);
  175. break;
  176. case SHA256_DIGEST_SIZE:
  177. base_hash = crypto_alloc_shash("sha256-generic", 0, 0);
  178. break;
  179. case SHA384_DIGEST_SIZE:
  180. base_hash = crypto_alloc_shash("sha384-generic", 0, 0);
  181. break;
  182. case SHA512_DIGEST_SIZE:
  183. base_hash = crypto_alloc_shash("sha512-generic", 0, 0);
  184. break;
  185. }
  186. if (IS_ERR(base_hash)) {
  187. pr_err("Can not allocate sha-generic algo.\n");
  188. return (void *)base_hash;
  189. }
  190. desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(base_hash),
  191. GFP_KERNEL);
  192. if (!desc)
  193. return ERR_PTR(-ENOMEM);
  194. desc->tfm = base_hash;
  195. desc->flags = crypto_shash_get_flags(base_hash);
  196. return desc;
  197. }
  198. static int chcr_compute_partial_hash(struct shash_desc *desc,
  199. char *iopad, char *result_hash,
  200. int digest_size)
  201. {
  202. struct sha1_state sha1_st;
  203. struct sha256_state sha256_st;
  204. struct sha512_state sha512_st;
  205. int error;
  206. if (digest_size == SHA1_DIGEST_SIZE) {
  207. error = crypto_shash_init(desc) ?:
  208. crypto_shash_update(desc, iopad, SHA1_BLOCK_SIZE) ?:
  209. crypto_shash_export(desc, (void *)&sha1_st);
  210. memcpy(result_hash, sha1_st.state, SHA1_DIGEST_SIZE);
  211. } else if (digest_size == SHA224_DIGEST_SIZE) {
  212. error = crypto_shash_init(desc) ?:
  213. crypto_shash_update(desc, iopad, SHA256_BLOCK_SIZE) ?:
  214. crypto_shash_export(desc, (void *)&sha256_st);
  215. memcpy(result_hash, sha256_st.state, SHA256_DIGEST_SIZE);
  216. } else if (digest_size == SHA256_DIGEST_SIZE) {
  217. error = crypto_shash_init(desc) ?:
  218. crypto_shash_update(desc, iopad, SHA256_BLOCK_SIZE) ?:
  219. crypto_shash_export(desc, (void *)&sha256_st);
  220. memcpy(result_hash, sha256_st.state, SHA256_DIGEST_SIZE);
  221. } else if (digest_size == SHA384_DIGEST_SIZE) {
  222. error = crypto_shash_init(desc) ?:
  223. crypto_shash_update(desc, iopad, SHA512_BLOCK_SIZE) ?:
  224. crypto_shash_export(desc, (void *)&sha512_st);
  225. memcpy(result_hash, sha512_st.state, SHA512_DIGEST_SIZE);
  226. } else if (digest_size == SHA512_DIGEST_SIZE) {
  227. error = crypto_shash_init(desc) ?:
  228. crypto_shash_update(desc, iopad, SHA512_BLOCK_SIZE) ?:
  229. crypto_shash_export(desc, (void *)&sha512_st);
  230. memcpy(result_hash, sha512_st.state, SHA512_DIGEST_SIZE);
  231. } else {
  232. error = -EINVAL;
  233. pr_err("Unknown digest size %d\n", digest_size);
  234. }
  235. return error;
  236. }
  237. static void chcr_change_order(char *buf, int ds)
  238. {
  239. int i;
  240. if (ds == SHA512_DIGEST_SIZE) {
  241. for (i = 0; i < (ds / sizeof(u64)); i++)
  242. *((__be64 *)buf + i) =
  243. cpu_to_be64(*((u64 *)buf + i));
  244. } else {
  245. for (i = 0; i < (ds / sizeof(u32)); i++)
  246. *((__be32 *)buf + i) =
  247. cpu_to_be32(*((u32 *)buf + i));
  248. }
  249. }
  250. static inline int is_hmac(struct crypto_tfm *tfm)
  251. {
  252. struct crypto_alg *alg = tfm->__crt_alg;
  253. struct chcr_alg_template *chcr_crypto_alg =
  254. container_of(__crypto_ahash_alg(alg), struct chcr_alg_template,
  255. alg.hash);
  256. if ((chcr_crypto_alg->type & CRYPTO_ALG_SUB_TYPE_MASK) ==
  257. CRYPTO_ALG_SUB_TYPE_HASH_HMAC)
  258. return 1;
  259. return 0;
  260. }
  261. static inline unsigned int ch_nents(struct scatterlist *sg,
  262. unsigned int *total_size)
  263. {
  264. unsigned int nents;
  265. for (nents = 0, *total_size = 0; sg; sg = sg_next(sg)) {
  266. nents++;
  267. *total_size += sg->length;
  268. }
  269. return nents;
  270. }
  271. static void write_phys_cpl(struct cpl_rx_phys_dsgl *phys_cpl,
  272. struct scatterlist *sg,
  273. struct phys_sge_parm *sg_param)
  274. {
  275. struct phys_sge_pairs *to;
  276. unsigned int out_buf_size = sg_param->obsize;
  277. unsigned int nents = sg_param->nents, i, j, tot_len = 0;
  278. phys_cpl->op_to_tid = htonl(CPL_RX_PHYS_DSGL_OPCODE_V(CPL_RX_PHYS_DSGL)
  279. | CPL_RX_PHYS_DSGL_ISRDMA_V(0));
  280. phys_cpl->pcirlxorder_to_noofsgentr =
  281. htonl(CPL_RX_PHYS_DSGL_PCIRLXORDER_V(0) |
  282. CPL_RX_PHYS_DSGL_PCINOSNOOP_V(0) |
  283. CPL_RX_PHYS_DSGL_PCITPHNTENB_V(0) |
  284. CPL_RX_PHYS_DSGL_PCITPHNT_V(0) |
  285. CPL_RX_PHYS_DSGL_DCAID_V(0) |
  286. CPL_RX_PHYS_DSGL_NOOFSGENTR_V(nents));
  287. phys_cpl->rss_hdr_int.opcode = CPL_RX_PHYS_ADDR;
  288. phys_cpl->rss_hdr_int.qid = htons(sg_param->qid);
  289. phys_cpl->rss_hdr_int.hash_val = 0;
  290. to = (struct phys_sge_pairs *)((unsigned char *)phys_cpl +
  291. sizeof(struct cpl_rx_phys_dsgl));
  292. for (i = 0; nents; to++) {
  293. for (j = i; (nents && (j < (8 + i))); j++, nents--) {
  294. to->len[j] = htons(sg->length);
  295. to->addr[j] = cpu_to_be64(sg_dma_address(sg));
  296. if (out_buf_size) {
  297. if (tot_len + sg_dma_len(sg) >= out_buf_size) {
  298. to->len[j] = htons(out_buf_size -
  299. tot_len);
  300. return;
  301. }
  302. tot_len += sg_dma_len(sg);
  303. }
  304. sg = sg_next(sg);
  305. }
  306. }
  307. }
  308. static inline unsigned
  309. int map_writesg_phys_cpl(struct device *dev, struct cpl_rx_phys_dsgl *phys_cpl,
  310. struct scatterlist *sg, struct phys_sge_parm *sg_param)
  311. {
  312. if (!sg || !sg_param->nents)
  313. return 0;
  314. sg_param->nents = dma_map_sg(dev, sg, sg_param->nents, DMA_FROM_DEVICE);
  315. if (sg_param->nents == 0) {
  316. pr_err("CHCR : DMA mapping failed\n");
  317. return -EINVAL;
  318. }
  319. write_phys_cpl(phys_cpl, sg, sg_param);
  320. return 0;
  321. }
  322. static inline int get_cryptoalg_subtype(struct crypto_tfm *tfm)
  323. {
  324. struct crypto_alg *alg = tfm->__crt_alg;
  325. struct chcr_alg_template *chcr_crypto_alg =
  326. container_of(alg, struct chcr_alg_template, alg.crypto);
  327. return chcr_crypto_alg->type & CRYPTO_ALG_SUB_TYPE_MASK;
  328. }
  329. static inline void
  330. write_sg_data_page_desc(struct sk_buff *skb, unsigned int *frags,
  331. struct scatterlist *sg, unsigned int count)
  332. {
  333. struct page *spage;
  334. unsigned int page_len;
  335. skb->len += count;
  336. skb->data_len += count;
  337. skb->truesize += count;
  338. while (count > 0) {
  339. if (sg && (!(sg->length)))
  340. break;
  341. spage = sg_page(sg);
  342. get_page(spage);
  343. page_len = min(sg->length, count);
  344. skb_fill_page_desc(skb, *frags, spage, sg->offset, page_len);
  345. (*frags)++;
  346. count -= page_len;
  347. sg = sg_next(sg);
  348. }
  349. }
  350. static int generate_copy_rrkey(struct ablk_ctx *ablkctx,
  351. struct _key_ctx *key_ctx)
  352. {
  353. if (ablkctx->ciph_mode == CHCR_SCMD_CIPHER_MODE_AES_CBC) {
  354. get_aes_decrypt_key(key_ctx->key, ablkctx->key,
  355. ablkctx->enckey_len << 3);
  356. memset(key_ctx->key + ablkctx->enckey_len, 0,
  357. CHCR_AES_MAX_KEY_LEN - ablkctx->enckey_len);
  358. } else {
  359. memcpy(key_ctx->key,
  360. ablkctx->key + (ablkctx->enckey_len >> 1),
  361. ablkctx->enckey_len >> 1);
  362. get_aes_decrypt_key(key_ctx->key + (ablkctx->enckey_len >> 1),
  363. ablkctx->key, ablkctx->enckey_len << 2);
  364. }
  365. return 0;
  366. }
  367. static inline void create_wreq(struct chcr_context *ctx,
  368. struct fw_crypto_lookaside_wr *wreq,
  369. void *req, struct sk_buff *skb,
  370. int kctx_len, int hash_sz,
  371. unsigned int phys_dsgl)
  372. {
  373. struct uld_ctx *u_ctx = ULD_CTX(ctx);
  374. struct ulp_txpkt *ulptx = (struct ulp_txpkt *)(wreq + 1);
  375. struct ulptx_idata *sc_imm = (struct ulptx_idata *)(ulptx + 1);
  376. int iv_loc = IV_DSGL;
  377. int qid = u_ctx->lldi.rxq_ids[ctx->tx_channel_id];
  378. unsigned int immdatalen = 0, nr_frags = 0;
  379. if (is_ofld_imm(skb)) {
  380. immdatalen = skb->data_len;
  381. iv_loc = IV_IMMEDIATE;
  382. } else {
  383. nr_frags = skb_shinfo(skb)->nr_frags;
  384. }
  385. wreq->op_to_cctx_size = FILL_WR_OP_CCTX_SIZE(immdatalen,
  386. (kctx_len >> 4));
  387. wreq->pld_size_hash_size =
  388. htonl(FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE_V(sgl_lengths[nr_frags]) |
  389. FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE_V(hash_sz));
  390. wreq->len16_pkd = htonl(FW_CRYPTO_LOOKASIDE_WR_LEN16_V(DIV_ROUND_UP(
  391. (calc_tx_flits_ofld(skb) * 8), 16)));
  392. wreq->cookie = cpu_to_be64((uintptr_t)req);
  393. wreq->rx_chid_to_rx_q_id =
  394. FILL_WR_RX_Q_ID(ctx->dev->tx_channel_id, qid,
  395. (hash_sz) ? IV_NOP : iv_loc);
  396. ulptx->cmd_dest = FILL_ULPTX_CMD_DEST(ctx->dev->tx_channel_id);
  397. ulptx->len = htonl((DIV_ROUND_UP((calc_tx_flits_ofld(skb) * 8),
  398. 16) - ((sizeof(*wreq)) >> 4)));
  399. sc_imm->cmd_more = FILL_CMD_MORE(immdatalen);
  400. sc_imm->len = cpu_to_be32(sizeof(struct cpl_tx_sec_pdu) + kctx_len +
  401. ((hash_sz) ? DUMMY_BYTES :
  402. (sizeof(struct cpl_rx_phys_dsgl) +
  403. phys_dsgl)) + immdatalen);
  404. }
  405. /**
  406. * create_cipher_wr - form the WR for cipher operations
  407. * @req: cipher req.
  408. * @ctx: crypto driver context of the request.
  409. * @qid: ingress qid where response of this WR should be received.
  410. * @op_type: encryption or decryption
  411. */
  412. static struct sk_buff
  413. *create_cipher_wr(struct crypto_async_request *req_base,
  414. struct chcr_context *ctx, unsigned short qid,
  415. unsigned short op_type)
  416. {
  417. struct ablkcipher_request *req = (struct ablkcipher_request *)req_base;
  418. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  419. struct uld_ctx *u_ctx = ULD_CTX(ctx);
  420. struct ablk_ctx *ablkctx = ABLK_CTX(ctx);
  421. struct sk_buff *skb = NULL;
  422. struct _key_ctx *key_ctx;
  423. struct fw_crypto_lookaside_wr *wreq;
  424. struct cpl_tx_sec_pdu *sec_cpl;
  425. struct cpl_rx_phys_dsgl *phys_cpl;
  426. struct chcr_blkcipher_req_ctx *req_ctx = ablkcipher_request_ctx(req);
  427. struct phys_sge_parm sg_param;
  428. unsigned int frags = 0, transhdr_len, phys_dsgl, dst_bufsize = 0;
  429. unsigned int ivsize = crypto_ablkcipher_ivsize(tfm), kctx_len;
  430. if (!req->info)
  431. return ERR_PTR(-EINVAL);
  432. ablkctx->dst_nents = ch_nents(req->dst, &dst_bufsize);
  433. ablkctx->enc = op_type;
  434. if ((ablkctx->enckey_len == 0) || (ivsize > AES_BLOCK_SIZE) ||
  435. (req->nbytes <= 0) || (req->nbytes % AES_BLOCK_SIZE))
  436. return ERR_PTR(-EINVAL);
  437. phys_dsgl = get_space_for_phys_dsgl(ablkctx->dst_nents);
  438. kctx_len = sizeof(*key_ctx) +
  439. (DIV_ROUND_UP(ablkctx->enckey_len, 16) * 16);
  440. transhdr_len = CIPHER_TRANSHDR_SIZE(kctx_len, phys_dsgl);
  441. skb = alloc_skb((transhdr_len + sizeof(struct sge_opaque_hdr)),
  442. GFP_ATOMIC);
  443. if (!skb)
  444. return ERR_PTR(-ENOMEM);
  445. skb_reserve(skb, sizeof(struct sge_opaque_hdr));
  446. wreq = (struct fw_crypto_lookaside_wr *)__skb_put(skb, transhdr_len);
  447. sec_cpl = (struct cpl_tx_sec_pdu *)((u8 *)wreq + SEC_CPL_OFFSET);
  448. sec_cpl->op_ivinsrtofst =
  449. FILL_SEC_CPL_OP_IVINSR(ctx->dev->tx_channel_id, 2, 1, 1);
  450. sec_cpl->pldlen = htonl(ivsize + req->nbytes);
  451. sec_cpl->aadstart_cipherstop_hi = FILL_SEC_CPL_CIPHERSTOP_HI(0, 0,
  452. ivsize + 1, 0);
  453. sec_cpl->cipherstop_lo_authinsert = FILL_SEC_CPL_AUTHINSERT(0, 0,
  454. 0, 0);
  455. sec_cpl->seqno_numivs = FILL_SEC_CPL_SCMD0_SEQNO(op_type, 0,
  456. ablkctx->ciph_mode,
  457. 0, 0, ivsize >> 1, 1);
  458. sec_cpl->ivgen_hdrlen = FILL_SEC_CPL_IVGEN_HDRLEN(0, 0, 0,
  459. 0, 1, phys_dsgl);
  460. key_ctx = (struct _key_ctx *)((u8 *)sec_cpl + sizeof(*sec_cpl));
  461. key_ctx->ctx_hdr = ablkctx->key_ctx_hdr;
  462. if (op_type == CHCR_DECRYPT_OP) {
  463. if (generate_copy_rrkey(ablkctx, key_ctx))
  464. goto map_fail1;
  465. } else {
  466. if (ablkctx->ciph_mode == CHCR_SCMD_CIPHER_MODE_AES_CBC) {
  467. memcpy(key_ctx->key, ablkctx->key, ablkctx->enckey_len);
  468. } else {
  469. memcpy(key_ctx->key, ablkctx->key +
  470. (ablkctx->enckey_len >> 1),
  471. ablkctx->enckey_len >> 1);
  472. memcpy(key_ctx->key +
  473. (ablkctx->enckey_len >> 1),
  474. ablkctx->key,
  475. ablkctx->enckey_len >> 1);
  476. }
  477. }
  478. phys_cpl = (struct cpl_rx_phys_dsgl *)((u8 *)key_ctx + kctx_len);
  479. memcpy(ablkctx->iv, req->info, ivsize);
  480. sg_init_table(&ablkctx->iv_sg, 1);
  481. sg_set_buf(&ablkctx->iv_sg, ablkctx->iv, ivsize);
  482. sg_param.nents = ablkctx->dst_nents;
  483. sg_param.obsize = dst_bufsize;
  484. sg_param.qid = qid;
  485. sg_param.align = 1;
  486. if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, req->dst,
  487. &sg_param))
  488. goto map_fail1;
  489. skb_set_transport_header(skb, transhdr_len);
  490. write_sg_data_page_desc(skb, &frags, &ablkctx->iv_sg, ivsize);
  491. write_sg_data_page_desc(skb, &frags, req->src, req->nbytes);
  492. create_wreq(ctx, wreq, req, skb, kctx_len, 0, phys_dsgl);
  493. req_ctx->skb = skb;
  494. skb_get(skb);
  495. return skb;
  496. map_fail1:
  497. kfree_skb(skb);
  498. return ERR_PTR(-ENOMEM);
  499. }
  500. static int chcr_aes_cbc_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
  501. unsigned int keylen)
  502. {
  503. struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
  504. struct ablk_ctx *ablkctx = ABLK_CTX(ctx);
  505. struct ablkcipher_alg *alg = crypto_ablkcipher_alg(tfm);
  506. unsigned int ck_size, context_size;
  507. u16 alignment = 0;
  508. if ((keylen < alg->min_keysize) || (keylen > alg->max_keysize))
  509. goto badkey_err;
  510. memcpy(ablkctx->key, key, keylen);
  511. ablkctx->enckey_len = keylen;
  512. if (keylen == AES_KEYSIZE_128) {
  513. ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_128;
  514. } else if (keylen == AES_KEYSIZE_192) {
  515. alignment = 8;
  516. ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_192;
  517. } else if (keylen == AES_KEYSIZE_256) {
  518. ck_size = CHCR_KEYCTX_CIPHER_KEY_SIZE_256;
  519. } else {
  520. goto badkey_err;
  521. }
  522. context_size = (KEY_CONTEXT_HDR_SALT_AND_PAD +
  523. keylen + alignment) >> 4;
  524. ablkctx->key_ctx_hdr = FILL_KEY_CTX_HDR(ck_size, CHCR_KEYCTX_NO_KEY,
  525. 0, 0, context_size);
  526. ablkctx->ciph_mode = CHCR_SCMD_CIPHER_MODE_AES_CBC;
  527. return 0;
  528. badkey_err:
  529. crypto_ablkcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  530. ablkctx->enckey_len = 0;
  531. return -EINVAL;
  532. }
  533. static int cxgb4_is_crypto_q_full(struct net_device *dev, unsigned int idx)
  534. {
  535. int ret = 0;
  536. struct sge_ofld_txq *q;
  537. struct adapter *adap = netdev2adap(dev);
  538. local_bh_disable();
  539. q = &adap->sge.ofldtxq[idx];
  540. spin_lock(&q->sendq.lock);
  541. if (q->full)
  542. ret = -1;
  543. spin_unlock(&q->sendq.lock);
  544. local_bh_enable();
  545. return ret;
  546. }
  547. static int chcr_aes_encrypt(struct ablkcipher_request *req)
  548. {
  549. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  550. struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
  551. struct crypto_async_request *req_base = &req->base;
  552. struct uld_ctx *u_ctx = ULD_CTX(ctx);
  553. struct sk_buff *skb;
  554. if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
  555. ctx->tx_channel_id))) {
  556. if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
  557. return -EBUSY;
  558. }
  559. skb = create_cipher_wr(req_base, ctx,
  560. u_ctx->lldi.rxq_ids[ctx->tx_channel_id],
  561. CHCR_ENCRYPT_OP);
  562. if (IS_ERR(skb)) {
  563. pr_err("chcr : %s : Failed to form WR. No memory\n", __func__);
  564. return PTR_ERR(skb);
  565. }
  566. skb->dev = u_ctx->lldi.ports[0];
  567. set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
  568. chcr_send_wr(skb);
  569. return -EINPROGRESS;
  570. }
  571. static int chcr_aes_decrypt(struct ablkcipher_request *req)
  572. {
  573. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  574. struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
  575. struct crypto_async_request *req_base = &req->base;
  576. struct uld_ctx *u_ctx = ULD_CTX(ctx);
  577. struct sk_buff *skb;
  578. if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
  579. ctx->tx_channel_id))) {
  580. if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
  581. return -EBUSY;
  582. }
  583. skb = create_cipher_wr(req_base, ctx, u_ctx->lldi.rxq_ids[0],
  584. CHCR_DECRYPT_OP);
  585. if (IS_ERR(skb)) {
  586. pr_err("chcr : %s : Failed to form WR. No memory\n", __func__);
  587. return PTR_ERR(skb);
  588. }
  589. skb->dev = u_ctx->lldi.ports[0];
  590. set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
  591. chcr_send_wr(skb);
  592. return -EINPROGRESS;
  593. }
  594. static int chcr_device_init(struct chcr_context *ctx)
  595. {
  596. struct uld_ctx *u_ctx;
  597. unsigned int id;
  598. int err = 0, rxq_perchan, rxq_idx;
  599. id = smp_processor_id();
  600. if (!ctx->dev) {
  601. err = assign_chcr_device(&ctx->dev);
  602. if (err) {
  603. pr_err("chcr device assignment fails\n");
  604. goto out;
  605. }
  606. u_ctx = ULD_CTX(ctx);
  607. rxq_perchan = u_ctx->lldi.nrxq / u_ctx->lldi.nchan;
  608. ctx->dev->tx_channel_id = 0;
  609. rxq_idx = ctx->dev->tx_channel_id * rxq_perchan;
  610. rxq_idx += id % rxq_perchan;
  611. spin_lock(&ctx->dev->lock_chcr_dev);
  612. ctx->tx_channel_id = rxq_idx;
  613. spin_unlock(&ctx->dev->lock_chcr_dev);
  614. }
  615. out:
  616. return err;
  617. }
  618. static int chcr_cra_init(struct crypto_tfm *tfm)
  619. {
  620. tfm->crt_ablkcipher.reqsize = sizeof(struct chcr_blkcipher_req_ctx);
  621. return chcr_device_init(crypto_tfm_ctx(tfm));
  622. }
  623. static int get_alg_config(struct algo_param *params,
  624. unsigned int auth_size)
  625. {
  626. switch (auth_size) {
  627. case SHA1_DIGEST_SIZE:
  628. params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_160;
  629. params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA1;
  630. params->result_size = SHA1_DIGEST_SIZE;
  631. break;
  632. case SHA224_DIGEST_SIZE:
  633. params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_256;
  634. params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA224;
  635. params->result_size = SHA256_DIGEST_SIZE;
  636. break;
  637. case SHA256_DIGEST_SIZE:
  638. params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_256;
  639. params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA256;
  640. params->result_size = SHA256_DIGEST_SIZE;
  641. break;
  642. case SHA384_DIGEST_SIZE:
  643. params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_512;
  644. params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA512_384;
  645. params->result_size = SHA512_DIGEST_SIZE;
  646. break;
  647. case SHA512_DIGEST_SIZE:
  648. params->mk_size = CHCR_KEYCTX_MAC_KEY_SIZE_512;
  649. params->auth_mode = CHCR_SCMD_AUTH_MODE_SHA512_512;
  650. params->result_size = SHA512_DIGEST_SIZE;
  651. break;
  652. default:
  653. pr_err("chcr : ERROR, unsupported digest size\n");
  654. return -EINVAL;
  655. }
  656. return 0;
  657. }
  658. static inline int
  659. write_buffer_data_page_desc(struct chcr_ahash_req_ctx *req_ctx,
  660. struct sk_buff *skb, unsigned int *frags, char *bfr,
  661. u8 bfr_len)
  662. {
  663. void *page_ptr = NULL;
  664. skb->len += bfr_len;
  665. skb->data_len += bfr_len;
  666. skb->truesize += bfr_len;
  667. page_ptr = kmalloc(CHCR_HASH_MAX_BLOCK_SIZE_128, GFP_ATOMIC | GFP_DMA);
  668. if (!page_ptr)
  669. return -ENOMEM;
  670. get_page(virt_to_page(page_ptr));
  671. req_ctx->dummy_payload_ptr = page_ptr;
  672. memcpy(page_ptr, bfr, bfr_len);
  673. skb_fill_page_desc(skb, *frags, virt_to_page(page_ptr),
  674. offset_in_page(page_ptr), bfr_len);
  675. (*frags)++;
  676. return 0;
  677. }
  678. /**
  679. * create_final_hash_wr - Create hash work request
  680. * @req - Cipher req base
  681. */
  682. static struct sk_buff *create_final_hash_wr(struct ahash_request *req,
  683. struct hash_wr_param *param)
  684. {
  685. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
  686. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  687. struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  688. struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
  689. struct sk_buff *skb = NULL;
  690. struct _key_ctx *key_ctx;
  691. struct fw_crypto_lookaside_wr *wreq;
  692. struct cpl_tx_sec_pdu *sec_cpl;
  693. unsigned int frags = 0, transhdr_len, iopad_alignment = 0;
  694. unsigned int digestsize = crypto_ahash_digestsize(tfm);
  695. unsigned int kctx_len = sizeof(*key_ctx);
  696. u8 hash_size_in_response = 0;
  697. iopad_alignment = KEYCTX_ALIGN_PAD(digestsize);
  698. kctx_len += param->alg_prm.result_size + iopad_alignment;
  699. if (param->opad_needed)
  700. kctx_len += param->alg_prm.result_size + iopad_alignment;
  701. if (req_ctx->result)
  702. hash_size_in_response = digestsize;
  703. else
  704. hash_size_in_response = param->alg_prm.result_size;
  705. transhdr_len = HASH_TRANSHDR_SIZE(kctx_len);
  706. skb = alloc_skb((transhdr_len + sizeof(struct sge_opaque_hdr)),
  707. GFP_ATOMIC);
  708. if (!skb)
  709. return skb;
  710. skb_reserve(skb, sizeof(struct sge_opaque_hdr));
  711. wreq = (struct fw_crypto_lookaside_wr *)__skb_put(skb, transhdr_len);
  712. memset(wreq, 0, transhdr_len);
  713. sec_cpl = (struct cpl_tx_sec_pdu *)((u8 *)wreq + SEC_CPL_OFFSET);
  714. sec_cpl->op_ivinsrtofst =
  715. FILL_SEC_CPL_OP_IVINSR(ctx->dev->tx_channel_id, 2, 0, 0);
  716. sec_cpl->pldlen = htonl(param->bfr_len + param->sg_len);
  717. sec_cpl->aadstart_cipherstop_hi =
  718. FILL_SEC_CPL_CIPHERSTOP_HI(0, 0, 0, 0);
  719. sec_cpl->cipherstop_lo_authinsert =
  720. FILL_SEC_CPL_AUTHINSERT(0, 1, 0, 0);
  721. sec_cpl->seqno_numivs =
  722. FILL_SEC_CPL_SCMD0_SEQNO(0, 0, 0, param->alg_prm.auth_mode,
  723. param->opad_needed, 0, 0);
  724. sec_cpl->ivgen_hdrlen =
  725. FILL_SEC_CPL_IVGEN_HDRLEN(param->last, param->more, 0, 1, 0, 0);
  726. key_ctx = (struct _key_ctx *)((u8 *)sec_cpl + sizeof(*sec_cpl));
  727. memcpy(key_ctx->key, req_ctx->partial_hash, param->alg_prm.result_size);
  728. if (param->opad_needed)
  729. memcpy(key_ctx->key + ((param->alg_prm.result_size <= 32) ? 32 :
  730. CHCR_HASH_MAX_DIGEST_SIZE),
  731. hmacctx->opad, param->alg_prm.result_size);
  732. key_ctx->ctx_hdr = FILL_KEY_CTX_HDR(CHCR_KEYCTX_NO_KEY,
  733. param->alg_prm.mk_size, 0,
  734. param->opad_needed,
  735. (kctx_len >> 4));
  736. sec_cpl->scmd1 = cpu_to_be64((u64)param->scmd1);
  737. skb_set_transport_header(skb, transhdr_len);
  738. if (param->bfr_len != 0)
  739. write_buffer_data_page_desc(req_ctx, skb, &frags, req_ctx->bfr,
  740. param->bfr_len);
  741. if (param->sg_len != 0)
  742. write_sg_data_page_desc(skb, &frags, req->src, param->sg_len);
  743. create_wreq(ctx, wreq, req, skb, kctx_len, hash_size_in_response,
  744. 0);
  745. req_ctx->skb = skb;
  746. skb_get(skb);
  747. return skb;
  748. }
  749. static int chcr_ahash_update(struct ahash_request *req)
  750. {
  751. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
  752. struct crypto_ahash *rtfm = crypto_ahash_reqtfm(req);
  753. struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
  754. struct uld_ctx *u_ctx = NULL;
  755. struct sk_buff *skb;
  756. u8 remainder = 0, bs;
  757. unsigned int nbytes = req->nbytes;
  758. struct hash_wr_param params;
  759. bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
  760. u_ctx = ULD_CTX(ctx);
  761. if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
  762. ctx->tx_channel_id))) {
  763. if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
  764. return -EBUSY;
  765. }
  766. if (nbytes + req_ctx->bfr_len >= bs) {
  767. remainder = (nbytes + req_ctx->bfr_len) % bs;
  768. nbytes = nbytes + req_ctx->bfr_len - remainder;
  769. } else {
  770. sg_pcopy_to_buffer(req->src, sg_nents(req->src), req_ctx->bfr +
  771. req_ctx->bfr_len, nbytes, 0);
  772. req_ctx->bfr_len += nbytes;
  773. return 0;
  774. }
  775. params.opad_needed = 0;
  776. params.more = 1;
  777. params.last = 0;
  778. params.sg_len = nbytes - req_ctx->bfr_len;
  779. params.bfr_len = req_ctx->bfr_len;
  780. params.scmd1 = 0;
  781. get_alg_config(&params.alg_prm, crypto_ahash_digestsize(rtfm));
  782. req_ctx->result = 0;
  783. req_ctx->data_len += params.sg_len + params.bfr_len;
  784. skb = create_final_hash_wr(req, &params);
  785. if (!skb)
  786. return -ENOMEM;
  787. req_ctx->bfr_len = remainder;
  788. if (remainder)
  789. sg_pcopy_to_buffer(req->src, sg_nents(req->src),
  790. req_ctx->bfr, remainder, req->nbytes -
  791. remainder);
  792. skb->dev = u_ctx->lldi.ports[0];
  793. set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
  794. chcr_send_wr(skb);
  795. return -EINPROGRESS;
  796. }
  797. static void create_last_hash_block(char *bfr_ptr, unsigned int bs, u64 scmd1)
  798. {
  799. memset(bfr_ptr, 0, bs);
  800. *bfr_ptr = 0x80;
  801. if (bs == 64)
  802. *(__be64 *)(bfr_ptr + 56) = cpu_to_be64(scmd1 << 3);
  803. else
  804. *(__be64 *)(bfr_ptr + 120) = cpu_to_be64(scmd1 << 3);
  805. }
  806. static int chcr_ahash_final(struct ahash_request *req)
  807. {
  808. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
  809. struct crypto_ahash *rtfm = crypto_ahash_reqtfm(req);
  810. struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
  811. struct hash_wr_param params;
  812. struct sk_buff *skb;
  813. struct uld_ctx *u_ctx = NULL;
  814. u8 bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
  815. u_ctx = ULD_CTX(ctx);
  816. if (is_hmac(crypto_ahash_tfm(rtfm)))
  817. params.opad_needed = 1;
  818. else
  819. params.opad_needed = 0;
  820. params.sg_len = 0;
  821. get_alg_config(&params.alg_prm, crypto_ahash_digestsize(rtfm));
  822. req_ctx->result = 1;
  823. params.bfr_len = req_ctx->bfr_len;
  824. req_ctx->data_len += params.bfr_len + params.sg_len;
  825. if (req_ctx->bfr && (req_ctx->bfr_len == 0)) {
  826. create_last_hash_block(req_ctx->bfr, bs, req_ctx->data_len);
  827. params.last = 0;
  828. params.more = 1;
  829. params.scmd1 = 0;
  830. params.bfr_len = bs;
  831. } else {
  832. params.scmd1 = req_ctx->data_len;
  833. params.last = 1;
  834. params.more = 0;
  835. }
  836. skb = create_final_hash_wr(req, &params);
  837. skb->dev = u_ctx->lldi.ports[0];
  838. set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
  839. chcr_send_wr(skb);
  840. return -EINPROGRESS;
  841. }
  842. static int chcr_ahash_finup(struct ahash_request *req)
  843. {
  844. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
  845. struct crypto_ahash *rtfm = crypto_ahash_reqtfm(req);
  846. struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
  847. struct uld_ctx *u_ctx = NULL;
  848. struct sk_buff *skb;
  849. struct hash_wr_param params;
  850. u8 bs;
  851. bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
  852. u_ctx = ULD_CTX(ctx);
  853. if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
  854. ctx->tx_channel_id))) {
  855. if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
  856. return -EBUSY;
  857. }
  858. if (is_hmac(crypto_ahash_tfm(rtfm)))
  859. params.opad_needed = 1;
  860. else
  861. params.opad_needed = 0;
  862. params.sg_len = req->nbytes;
  863. params.bfr_len = req_ctx->bfr_len;
  864. get_alg_config(&params.alg_prm, crypto_ahash_digestsize(rtfm));
  865. req_ctx->data_len += params.bfr_len + params.sg_len;
  866. req_ctx->result = 1;
  867. if (req_ctx->bfr && (req_ctx->bfr_len + req->nbytes) == 0) {
  868. create_last_hash_block(req_ctx->bfr, bs, req_ctx->data_len);
  869. params.last = 0;
  870. params.more = 1;
  871. params.scmd1 = 0;
  872. params.bfr_len = bs;
  873. } else {
  874. params.scmd1 = req_ctx->data_len;
  875. params.last = 1;
  876. params.more = 0;
  877. }
  878. skb = create_final_hash_wr(req, &params);
  879. if (!skb)
  880. return -ENOMEM;
  881. skb->dev = u_ctx->lldi.ports[0];
  882. set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
  883. chcr_send_wr(skb);
  884. return -EINPROGRESS;
  885. }
  886. static int chcr_ahash_digest(struct ahash_request *req)
  887. {
  888. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(req);
  889. struct crypto_ahash *rtfm = crypto_ahash_reqtfm(req);
  890. struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
  891. struct uld_ctx *u_ctx = NULL;
  892. struct sk_buff *skb;
  893. struct hash_wr_param params;
  894. u8 bs;
  895. rtfm->init(req);
  896. bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
  897. u_ctx = ULD_CTX(ctx);
  898. if (unlikely(cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0],
  899. ctx->tx_channel_id))) {
  900. if (!(req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG))
  901. return -EBUSY;
  902. }
  903. if (is_hmac(crypto_ahash_tfm(rtfm)))
  904. params.opad_needed = 1;
  905. else
  906. params.opad_needed = 0;
  907. params.last = 0;
  908. params.more = 0;
  909. params.sg_len = req->nbytes;
  910. params.bfr_len = 0;
  911. params.scmd1 = 0;
  912. get_alg_config(&params.alg_prm, crypto_ahash_digestsize(rtfm));
  913. req_ctx->result = 1;
  914. req_ctx->data_len += params.bfr_len + params.sg_len;
  915. if (req_ctx->bfr && req->nbytes == 0) {
  916. create_last_hash_block(req_ctx->bfr, bs, 0);
  917. params.more = 1;
  918. params.bfr_len = bs;
  919. }
  920. skb = create_final_hash_wr(req, &params);
  921. if (!skb)
  922. return -ENOMEM;
  923. skb->dev = u_ctx->lldi.ports[0];
  924. set_wr_txq(skb, CPL_PRIORITY_DATA, ctx->tx_channel_id);
  925. chcr_send_wr(skb);
  926. return -EINPROGRESS;
  927. }
  928. static int chcr_ahash_export(struct ahash_request *areq, void *out)
  929. {
  930. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
  931. struct chcr_ahash_req_ctx *state = out;
  932. state->bfr_len = req_ctx->bfr_len;
  933. state->data_len = req_ctx->data_len;
  934. memcpy(state->bfr, req_ctx->bfr, CHCR_HASH_MAX_BLOCK_SIZE_128);
  935. memcpy(state->partial_hash, req_ctx->partial_hash,
  936. CHCR_HASH_MAX_DIGEST_SIZE);
  937. return 0;
  938. }
  939. static int chcr_ahash_import(struct ahash_request *areq, const void *in)
  940. {
  941. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
  942. struct chcr_ahash_req_ctx *state = (struct chcr_ahash_req_ctx *)in;
  943. req_ctx->bfr_len = state->bfr_len;
  944. req_ctx->data_len = state->data_len;
  945. req_ctx->dummy_payload_ptr = NULL;
  946. memcpy(req_ctx->bfr, state->bfr, CHCR_HASH_MAX_BLOCK_SIZE_128);
  947. memcpy(req_ctx->partial_hash, state->partial_hash,
  948. CHCR_HASH_MAX_DIGEST_SIZE);
  949. return 0;
  950. }
  951. static int chcr_ahash_setkey(struct crypto_ahash *tfm, const u8 *key,
  952. unsigned int keylen)
  953. {
  954. struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  955. struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
  956. unsigned int digestsize = crypto_ahash_digestsize(tfm);
  957. unsigned int bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  958. unsigned int i, err = 0, updated_digestsize;
  959. /*
  960. * use the key to calculate the ipad and opad. ipad will sent with the
  961. * first request's data. opad will be sent with the final hash result
  962. * ipad in hmacctx->ipad and opad in hmacctx->opad location
  963. */
  964. if (!hmacctx->desc)
  965. return -EINVAL;
  966. if (keylen > bs) {
  967. err = crypto_shash_digest(hmacctx->desc, key, keylen,
  968. hmacctx->ipad);
  969. if (err)
  970. goto out;
  971. keylen = digestsize;
  972. } else {
  973. memcpy(hmacctx->ipad, key, keylen);
  974. }
  975. memset(hmacctx->ipad + keylen, 0, bs - keylen);
  976. memcpy(hmacctx->opad, hmacctx->ipad, bs);
  977. for (i = 0; i < bs / sizeof(int); i++) {
  978. *((unsigned int *)(&hmacctx->ipad) + i) ^= IPAD_DATA;
  979. *((unsigned int *)(&hmacctx->opad) + i) ^= OPAD_DATA;
  980. }
  981. updated_digestsize = digestsize;
  982. if (digestsize == SHA224_DIGEST_SIZE)
  983. updated_digestsize = SHA256_DIGEST_SIZE;
  984. else if (digestsize == SHA384_DIGEST_SIZE)
  985. updated_digestsize = SHA512_DIGEST_SIZE;
  986. err = chcr_compute_partial_hash(hmacctx->desc, hmacctx->ipad,
  987. hmacctx->ipad, digestsize);
  988. if (err)
  989. goto out;
  990. chcr_change_order(hmacctx->ipad, updated_digestsize);
  991. err = chcr_compute_partial_hash(hmacctx->desc, hmacctx->opad,
  992. hmacctx->opad, digestsize);
  993. if (err)
  994. goto out;
  995. chcr_change_order(hmacctx->opad, updated_digestsize);
  996. out:
  997. return err;
  998. }
  999. static int chcr_aes_xts_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
  1000. unsigned int key_len)
  1001. {
  1002. struct chcr_context *ctx = crypto_ablkcipher_ctx(tfm);
  1003. struct ablk_ctx *ablkctx = ABLK_CTX(ctx);
  1004. int status = 0;
  1005. unsigned short context_size = 0;
  1006. if ((key_len == (AES_KEYSIZE_128 << 1)) ||
  1007. (key_len == (AES_KEYSIZE_256 << 1))) {
  1008. memcpy(ablkctx->key, key, key_len);
  1009. ablkctx->enckey_len = key_len;
  1010. context_size = (KEY_CONTEXT_HDR_SALT_AND_PAD + key_len) >> 4;
  1011. ablkctx->key_ctx_hdr =
  1012. FILL_KEY_CTX_HDR((key_len == AES_KEYSIZE_256) ?
  1013. CHCR_KEYCTX_CIPHER_KEY_SIZE_128 :
  1014. CHCR_KEYCTX_CIPHER_KEY_SIZE_256,
  1015. CHCR_KEYCTX_NO_KEY, 1,
  1016. 0, context_size);
  1017. ablkctx->ciph_mode = CHCR_SCMD_CIPHER_MODE_AES_XTS;
  1018. } else {
  1019. crypto_tfm_set_flags((struct crypto_tfm *)tfm,
  1020. CRYPTO_TFM_RES_BAD_KEY_LEN);
  1021. ablkctx->enckey_len = 0;
  1022. status = -EINVAL;
  1023. }
  1024. return status;
  1025. }
  1026. static int chcr_sha_init(struct ahash_request *areq)
  1027. {
  1028. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
  1029. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  1030. int digestsize = crypto_ahash_digestsize(tfm);
  1031. req_ctx->data_len = 0;
  1032. req_ctx->dummy_payload_ptr = NULL;
  1033. req_ctx->bfr_len = 0;
  1034. req_ctx->skb = NULL;
  1035. req_ctx->result = 0;
  1036. copy_hash_init_values(req_ctx->partial_hash, digestsize);
  1037. return 0;
  1038. }
  1039. static int chcr_sha_cra_init(struct crypto_tfm *tfm)
  1040. {
  1041. crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
  1042. sizeof(struct chcr_ahash_req_ctx));
  1043. return chcr_device_init(crypto_tfm_ctx(tfm));
  1044. }
  1045. static int chcr_hmac_init(struct ahash_request *areq)
  1046. {
  1047. struct chcr_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
  1048. struct crypto_ahash *rtfm = crypto_ahash_reqtfm(areq);
  1049. struct chcr_context *ctx = crypto_tfm_ctx(crypto_ahash_tfm(rtfm));
  1050. struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
  1051. unsigned int digestsize = crypto_ahash_digestsize(rtfm);
  1052. unsigned int bs = crypto_tfm_alg_blocksize(crypto_ahash_tfm(rtfm));
  1053. chcr_sha_init(areq);
  1054. req_ctx->data_len = bs;
  1055. if (is_hmac(crypto_ahash_tfm(rtfm))) {
  1056. if (digestsize == SHA224_DIGEST_SIZE)
  1057. memcpy(req_ctx->partial_hash, hmacctx->ipad,
  1058. SHA256_DIGEST_SIZE);
  1059. else if (digestsize == SHA384_DIGEST_SIZE)
  1060. memcpy(req_ctx->partial_hash, hmacctx->ipad,
  1061. SHA512_DIGEST_SIZE);
  1062. else
  1063. memcpy(req_ctx->partial_hash, hmacctx->ipad,
  1064. digestsize);
  1065. }
  1066. return 0;
  1067. }
  1068. static int chcr_hmac_cra_init(struct crypto_tfm *tfm)
  1069. {
  1070. struct chcr_context *ctx = crypto_tfm_ctx(tfm);
  1071. struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
  1072. unsigned int digestsize =
  1073. crypto_ahash_digestsize(__crypto_ahash_cast(tfm));
  1074. crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
  1075. sizeof(struct chcr_ahash_req_ctx));
  1076. hmacctx->desc = chcr_alloc_shash(digestsize);
  1077. if (IS_ERR(hmacctx->desc))
  1078. return PTR_ERR(hmacctx->desc);
  1079. return chcr_device_init(crypto_tfm_ctx(tfm));
  1080. }
  1081. static void chcr_free_shash(struct shash_desc *desc)
  1082. {
  1083. crypto_free_shash(desc->tfm);
  1084. kfree(desc);
  1085. }
  1086. static void chcr_hmac_cra_exit(struct crypto_tfm *tfm)
  1087. {
  1088. struct chcr_context *ctx = crypto_tfm_ctx(tfm);
  1089. struct hmac_ctx *hmacctx = HMAC_CTX(ctx);
  1090. if (hmacctx->desc) {
  1091. chcr_free_shash(hmacctx->desc);
  1092. hmacctx->desc = NULL;
  1093. }
  1094. }
  1095. static struct chcr_alg_template driver_algs[] = {
  1096. /* AES-CBC */
  1097. {
  1098. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  1099. .is_registered = 0,
  1100. .alg.crypto = {
  1101. .cra_name = "cbc(aes)",
  1102. .cra_driver_name = "cbc(aes-chcr)",
  1103. .cra_priority = CHCR_CRA_PRIORITY,
  1104. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
  1105. CRYPTO_ALG_ASYNC,
  1106. .cra_blocksize = AES_BLOCK_SIZE,
  1107. .cra_ctxsize = sizeof(struct chcr_context)
  1108. + sizeof(struct ablk_ctx),
  1109. .cra_alignmask = 0,
  1110. .cra_type = &crypto_ablkcipher_type,
  1111. .cra_module = THIS_MODULE,
  1112. .cra_init = chcr_cra_init,
  1113. .cra_exit = NULL,
  1114. .cra_u.ablkcipher = {
  1115. .min_keysize = AES_MIN_KEY_SIZE,
  1116. .max_keysize = AES_MAX_KEY_SIZE,
  1117. .ivsize = AES_BLOCK_SIZE,
  1118. .setkey = chcr_aes_cbc_setkey,
  1119. .encrypt = chcr_aes_encrypt,
  1120. .decrypt = chcr_aes_decrypt,
  1121. }
  1122. }
  1123. },
  1124. {
  1125. .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
  1126. .is_registered = 0,
  1127. .alg.crypto = {
  1128. .cra_name = "xts(aes)",
  1129. .cra_driver_name = "xts(aes-chcr)",
  1130. .cra_priority = CHCR_CRA_PRIORITY,
  1131. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
  1132. CRYPTO_ALG_ASYNC,
  1133. .cra_blocksize = AES_BLOCK_SIZE,
  1134. .cra_ctxsize = sizeof(struct chcr_context) +
  1135. sizeof(struct ablk_ctx),
  1136. .cra_alignmask = 0,
  1137. .cra_type = &crypto_ablkcipher_type,
  1138. .cra_module = THIS_MODULE,
  1139. .cra_init = chcr_cra_init,
  1140. .cra_exit = NULL,
  1141. .cra_u = {
  1142. .ablkcipher = {
  1143. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1144. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1145. .ivsize = AES_BLOCK_SIZE,
  1146. .setkey = chcr_aes_xts_setkey,
  1147. .encrypt = chcr_aes_encrypt,
  1148. .decrypt = chcr_aes_decrypt,
  1149. }
  1150. }
  1151. }
  1152. },
  1153. /* SHA */
  1154. {
  1155. .type = CRYPTO_ALG_TYPE_AHASH,
  1156. .is_registered = 0,
  1157. .alg.hash = {
  1158. .halg.digestsize = SHA1_DIGEST_SIZE,
  1159. .halg.base = {
  1160. .cra_name = "sha1",
  1161. .cra_driver_name = "sha1-chcr",
  1162. .cra_blocksize = SHA1_BLOCK_SIZE,
  1163. }
  1164. }
  1165. },
  1166. {
  1167. .type = CRYPTO_ALG_TYPE_AHASH,
  1168. .is_registered = 0,
  1169. .alg.hash = {
  1170. .halg.digestsize = SHA256_DIGEST_SIZE,
  1171. .halg.base = {
  1172. .cra_name = "sha256",
  1173. .cra_driver_name = "sha256-chcr",
  1174. .cra_blocksize = SHA256_BLOCK_SIZE,
  1175. }
  1176. }
  1177. },
  1178. {
  1179. .type = CRYPTO_ALG_TYPE_AHASH,
  1180. .is_registered = 0,
  1181. .alg.hash = {
  1182. .halg.digestsize = SHA224_DIGEST_SIZE,
  1183. .halg.base = {
  1184. .cra_name = "sha224",
  1185. .cra_driver_name = "sha224-chcr",
  1186. .cra_blocksize = SHA224_BLOCK_SIZE,
  1187. }
  1188. }
  1189. },
  1190. {
  1191. .type = CRYPTO_ALG_TYPE_AHASH,
  1192. .is_registered = 0,
  1193. .alg.hash = {
  1194. .halg.digestsize = SHA384_DIGEST_SIZE,
  1195. .halg.base = {
  1196. .cra_name = "sha384",
  1197. .cra_driver_name = "sha384-chcr",
  1198. .cra_blocksize = SHA384_BLOCK_SIZE,
  1199. }
  1200. }
  1201. },
  1202. {
  1203. .type = CRYPTO_ALG_TYPE_AHASH,
  1204. .is_registered = 0,
  1205. .alg.hash = {
  1206. .halg.digestsize = SHA512_DIGEST_SIZE,
  1207. .halg.base = {
  1208. .cra_name = "sha512",
  1209. .cra_driver_name = "sha512-chcr",
  1210. .cra_blocksize = SHA512_BLOCK_SIZE,
  1211. }
  1212. }
  1213. },
  1214. /* HMAC */
  1215. {
  1216. .type = CRYPTO_ALG_TYPE_HMAC,
  1217. .is_registered = 0,
  1218. .alg.hash = {
  1219. .halg.digestsize = SHA1_DIGEST_SIZE,
  1220. .halg.base = {
  1221. .cra_name = "hmac(sha1)",
  1222. .cra_driver_name = "hmac(sha1-chcr)",
  1223. .cra_blocksize = SHA1_BLOCK_SIZE,
  1224. }
  1225. }
  1226. },
  1227. {
  1228. .type = CRYPTO_ALG_TYPE_HMAC,
  1229. .is_registered = 0,
  1230. .alg.hash = {
  1231. .halg.digestsize = SHA224_DIGEST_SIZE,
  1232. .halg.base = {
  1233. .cra_name = "hmac(sha224)",
  1234. .cra_driver_name = "hmac(sha224-chcr)",
  1235. .cra_blocksize = SHA224_BLOCK_SIZE,
  1236. }
  1237. }
  1238. },
  1239. {
  1240. .type = CRYPTO_ALG_TYPE_HMAC,
  1241. .is_registered = 0,
  1242. .alg.hash = {
  1243. .halg.digestsize = SHA256_DIGEST_SIZE,
  1244. .halg.base = {
  1245. .cra_name = "hmac(sha256)",
  1246. .cra_driver_name = "hmac(sha256-chcr)",
  1247. .cra_blocksize = SHA256_BLOCK_SIZE,
  1248. }
  1249. }
  1250. },
  1251. {
  1252. .type = CRYPTO_ALG_TYPE_HMAC,
  1253. .is_registered = 0,
  1254. .alg.hash = {
  1255. .halg.digestsize = SHA384_DIGEST_SIZE,
  1256. .halg.base = {
  1257. .cra_name = "hmac(sha384)",
  1258. .cra_driver_name = "hmac(sha384-chcr)",
  1259. .cra_blocksize = SHA384_BLOCK_SIZE,
  1260. }
  1261. }
  1262. },
  1263. {
  1264. .type = CRYPTO_ALG_TYPE_HMAC,
  1265. .is_registered = 0,
  1266. .alg.hash = {
  1267. .halg.digestsize = SHA512_DIGEST_SIZE,
  1268. .halg.base = {
  1269. .cra_name = "hmac(sha512)",
  1270. .cra_driver_name = "hmac(sha512-chcr)",
  1271. .cra_blocksize = SHA512_BLOCK_SIZE,
  1272. }
  1273. }
  1274. },
  1275. };
  1276. /*
  1277. * chcr_unregister_alg - Deregister crypto algorithms with
  1278. * kernel framework.
  1279. */
  1280. static int chcr_unregister_alg(void)
  1281. {
  1282. int i;
  1283. for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
  1284. switch (driver_algs[i].type & CRYPTO_ALG_TYPE_MASK) {
  1285. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1286. if (driver_algs[i].is_registered)
  1287. crypto_unregister_alg(
  1288. &driver_algs[i].alg.crypto);
  1289. break;
  1290. case CRYPTO_ALG_TYPE_AHASH:
  1291. if (driver_algs[i].is_registered)
  1292. crypto_unregister_ahash(
  1293. &driver_algs[i].alg.hash);
  1294. break;
  1295. }
  1296. driver_algs[i].is_registered = 0;
  1297. }
  1298. return 0;
  1299. }
  1300. #define SZ_AHASH_CTX sizeof(struct chcr_context)
  1301. #define SZ_AHASH_H_CTX (sizeof(struct chcr_context) + sizeof(struct hmac_ctx))
  1302. #define SZ_AHASH_REQ_CTX sizeof(struct chcr_ahash_req_ctx)
  1303. #define AHASH_CRA_FLAGS (CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC)
  1304. /*
  1305. * chcr_register_alg - Register crypto algorithms with kernel framework.
  1306. */
  1307. static int chcr_register_alg(void)
  1308. {
  1309. struct crypto_alg ai;
  1310. struct ahash_alg *a_hash;
  1311. int err = 0, i;
  1312. char *name = NULL;
  1313. for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
  1314. if (driver_algs[i].is_registered)
  1315. continue;
  1316. switch (driver_algs[i].type & CRYPTO_ALG_TYPE_MASK) {
  1317. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1318. err = crypto_register_alg(&driver_algs[i].alg.crypto);
  1319. name = driver_algs[i].alg.crypto.cra_driver_name;
  1320. break;
  1321. case CRYPTO_ALG_TYPE_AHASH:
  1322. a_hash = &driver_algs[i].alg.hash;
  1323. a_hash->update = chcr_ahash_update;
  1324. a_hash->final = chcr_ahash_final;
  1325. a_hash->finup = chcr_ahash_finup;
  1326. a_hash->digest = chcr_ahash_digest;
  1327. a_hash->export = chcr_ahash_export;
  1328. a_hash->import = chcr_ahash_import;
  1329. a_hash->halg.statesize = SZ_AHASH_REQ_CTX;
  1330. a_hash->halg.base.cra_priority = CHCR_CRA_PRIORITY;
  1331. a_hash->halg.base.cra_module = THIS_MODULE;
  1332. a_hash->halg.base.cra_flags = AHASH_CRA_FLAGS;
  1333. a_hash->halg.base.cra_alignmask = 0;
  1334. a_hash->halg.base.cra_exit = NULL;
  1335. a_hash->halg.base.cra_type = &crypto_ahash_type;
  1336. if (driver_algs[i].type == CRYPTO_ALG_TYPE_HMAC) {
  1337. a_hash->halg.base.cra_init = chcr_hmac_cra_init;
  1338. a_hash->halg.base.cra_exit = chcr_hmac_cra_exit;
  1339. a_hash->init = chcr_hmac_init;
  1340. a_hash->setkey = chcr_ahash_setkey;
  1341. a_hash->halg.base.cra_ctxsize = SZ_AHASH_H_CTX;
  1342. } else {
  1343. a_hash->init = chcr_sha_init;
  1344. a_hash->halg.base.cra_ctxsize = SZ_AHASH_CTX;
  1345. a_hash->halg.base.cra_init = chcr_sha_cra_init;
  1346. }
  1347. err = crypto_register_ahash(&driver_algs[i].alg.hash);
  1348. ai = driver_algs[i].alg.hash.halg.base;
  1349. name = ai.cra_driver_name;
  1350. break;
  1351. }
  1352. if (err) {
  1353. pr_err("chcr : %s : Algorithm registration failed\n",
  1354. name);
  1355. goto register_err;
  1356. } else {
  1357. driver_algs[i].is_registered = 1;
  1358. }
  1359. }
  1360. return 0;
  1361. register_err:
  1362. chcr_unregister_alg();
  1363. return err;
  1364. }
  1365. /*
  1366. * start_crypto - Register the crypto algorithms.
  1367. * This should called once when the first device comesup. After this
  1368. * kernel will start calling driver APIs for crypto operations.
  1369. */
  1370. int start_crypto(void)
  1371. {
  1372. return chcr_register_alg();
  1373. }
  1374. /*
  1375. * stop_crypto - Deregister all the crypto algorithms with kernel.
  1376. * This should be called once when the last device goes down. After this
  1377. * kernel will not call the driver API for crypto operations.
  1378. */
  1379. int stop_crypto(void)
  1380. {
  1381. chcr_unregister_alg();
  1382. return 0;
  1383. }