mc146818rtc.h 2.7 KB

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  1. /*
  2. * Machine dependent access functions for RTC registers.
  3. */
  4. #ifndef _ASM_X86_MC146818RTC_H
  5. #define _ASM_X86_MC146818RTC_H
  6. #include <asm/io.h>
  7. #include <asm/processor.h>
  8. #ifndef RTC_PORT
  9. #define RTC_PORT(x) (0x70 + (x))
  10. #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
  11. #endif
  12. #if defined(CONFIG_X86_32)
  13. /*
  14. * This lock provides nmi access to the CMOS/RTC registers. It has some
  15. * special properties. It is owned by a CPU and stores the index register
  16. * currently being accessed (if owned). The idea here is that it works
  17. * like a normal lock (normally). However, in an NMI, the NMI code will
  18. * first check to see if its CPU owns the lock, meaning that the NMI
  19. * interrupted during the read/write of the device. If it does, it goes ahead
  20. * and performs the access and then restores the index register. If it does
  21. * not, it locks normally.
  22. *
  23. * Note that since we are working with NMIs, we need this lock even in
  24. * a non-SMP machine just to mark that the lock is owned.
  25. *
  26. * This only works with compare-and-swap. There is no other way to
  27. * atomically claim the lock and set the owner.
  28. */
  29. #include <linux/smp.h>
  30. extern volatile unsigned long cmos_lock;
  31. /*
  32. * All of these below must be called with interrupts off, preempt
  33. * disabled, etc.
  34. */
  35. static inline void lock_cmos(unsigned char reg)
  36. {
  37. unsigned long new;
  38. new = ((smp_processor_id() + 1) << 8) | reg;
  39. for (;;) {
  40. if (cmos_lock) {
  41. cpu_relax();
  42. continue;
  43. }
  44. if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
  45. return;
  46. }
  47. }
  48. static inline void unlock_cmos(void)
  49. {
  50. cmos_lock = 0;
  51. }
  52. static inline int do_i_have_lock_cmos(void)
  53. {
  54. return (cmos_lock >> 8) == (smp_processor_id() + 1);
  55. }
  56. static inline unsigned char current_lock_cmos_reg(void)
  57. {
  58. return cmos_lock & 0xff;
  59. }
  60. #define lock_cmos_prefix(reg) \
  61. do { \
  62. unsigned long cmos_flags; \
  63. local_irq_save(cmos_flags); \
  64. lock_cmos(reg)
  65. #define lock_cmos_suffix(reg) \
  66. unlock_cmos(); \
  67. local_irq_restore(cmos_flags); \
  68. } while (0)
  69. #else
  70. #define lock_cmos_prefix(reg) do {} while (0)
  71. #define lock_cmos_suffix(reg) do {} while (0)
  72. #define lock_cmos(reg) do { } while (0)
  73. #define unlock_cmos() do { } while (0)
  74. #define do_i_have_lock_cmos() 0
  75. #define current_lock_cmos_reg() 0
  76. #endif
  77. /*
  78. * The yet supported machines all access the RTC index register via
  79. * an ISA port access but the way to access the date register differs ...
  80. */
  81. #define CMOS_READ(addr) rtc_cmos_read(addr)
  82. #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
  83. unsigned char rtc_cmos_read(unsigned char addr);
  84. void rtc_cmos_write(unsigned char val, unsigned char addr);
  85. extern int mach_set_rtc_mmss(const struct timespec *now);
  86. extern void mach_get_cmos_time(struct timespec *now);
  87. #define RTC_IRQ 8
  88. #endif /* _ASM_X86_MC146818RTC_H */