smp.c 30 KB

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  1. /*
  2. * SMP related functions
  3. *
  4. * Copyright IBM Corp. 1999, 2012
  5. * Author(s): Denis Joseph Barrow,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/mm.h>
  23. #include <linux/err.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irqflags.h>
  29. #include <linux/cpu.h>
  30. #include <linux/slab.h>
  31. #include <linux/crash_dump.h>
  32. #include <linux/memblock.h>
  33. #include <asm/asm-offsets.h>
  34. #include <asm/diag.h>
  35. #include <asm/switch_to.h>
  36. #include <asm/facility.h>
  37. #include <asm/ipl.h>
  38. #include <asm/setup.h>
  39. #include <asm/irq.h>
  40. #include <asm/tlbflush.h>
  41. #include <asm/vtimer.h>
  42. #include <asm/lowcore.h>
  43. #include <asm/sclp.h>
  44. #include <asm/vdso.h>
  45. #include <asm/debug.h>
  46. #include <asm/os_info.h>
  47. #include <asm/sigp.h>
  48. #include <asm/idle.h>
  49. #include "entry.h"
  50. enum {
  51. ec_schedule = 0,
  52. ec_call_function_single,
  53. ec_stop_cpu,
  54. };
  55. enum {
  56. CPU_STATE_STANDBY,
  57. CPU_STATE_CONFIGURED,
  58. };
  59. static DEFINE_PER_CPU(struct cpu *, cpu_device);
  60. struct pcpu {
  61. struct lowcore *lowcore; /* lowcore page(s) for the cpu */
  62. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  63. unsigned long ec_clk; /* sigp timestamp for ec_xxx */
  64. signed char state; /* physical cpu state */
  65. signed char polarization; /* physical polarization */
  66. u16 address; /* physical cpu address */
  67. };
  68. static u8 boot_core_type;
  69. static struct pcpu pcpu_devices[NR_CPUS];
  70. unsigned int smp_cpu_mt_shift;
  71. EXPORT_SYMBOL(smp_cpu_mt_shift);
  72. unsigned int smp_cpu_mtid;
  73. EXPORT_SYMBOL(smp_cpu_mtid);
  74. #ifdef CONFIG_CRASH_DUMP
  75. __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
  76. #endif
  77. static unsigned int smp_max_threads __initdata = -1U;
  78. static int __init early_nosmt(char *s)
  79. {
  80. smp_max_threads = 1;
  81. return 0;
  82. }
  83. early_param("nosmt", early_nosmt);
  84. static int __init early_smt(char *s)
  85. {
  86. get_option(&s, &smp_max_threads);
  87. return 0;
  88. }
  89. early_param("smt", early_smt);
  90. /*
  91. * The smp_cpu_state_mutex must be held when changing the state or polarization
  92. * member of a pcpu data structure within the pcpu_devices arreay.
  93. */
  94. DEFINE_MUTEX(smp_cpu_state_mutex);
  95. /*
  96. * Signal processor helper functions.
  97. */
  98. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
  99. {
  100. int cc;
  101. while (1) {
  102. cc = __pcpu_sigp(addr, order, parm, NULL);
  103. if (cc != SIGP_CC_BUSY)
  104. return cc;
  105. cpu_relax();
  106. }
  107. }
  108. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  109. {
  110. int cc, retry;
  111. for (retry = 0; ; retry++) {
  112. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  113. if (cc != SIGP_CC_BUSY)
  114. break;
  115. if (retry >= 3)
  116. udelay(10);
  117. }
  118. return cc;
  119. }
  120. static inline int pcpu_stopped(struct pcpu *pcpu)
  121. {
  122. u32 uninitialized_var(status);
  123. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  124. 0, &status) != SIGP_CC_STATUS_STORED)
  125. return 0;
  126. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  127. }
  128. static inline int pcpu_running(struct pcpu *pcpu)
  129. {
  130. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  131. 0, NULL) != SIGP_CC_STATUS_STORED)
  132. return 1;
  133. /* Status stored condition code is equivalent to cpu not running. */
  134. return 0;
  135. }
  136. /*
  137. * Find struct pcpu by cpu address.
  138. */
  139. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  140. {
  141. int cpu;
  142. for_each_cpu(cpu, mask)
  143. if (pcpu_devices[cpu].address == address)
  144. return pcpu_devices + cpu;
  145. return NULL;
  146. }
  147. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  148. {
  149. int order;
  150. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  151. return;
  152. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  153. pcpu->ec_clk = get_tod_clock_fast();
  154. pcpu_sigp_retry(pcpu, order, 0);
  155. }
  156. #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  157. #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  158. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  159. {
  160. unsigned long async_stack, panic_stack;
  161. struct lowcore *lc;
  162. if (pcpu != &pcpu_devices[0]) {
  163. pcpu->lowcore = (struct lowcore *)
  164. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  165. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  166. panic_stack = __get_free_page(GFP_KERNEL);
  167. if (!pcpu->lowcore || !panic_stack || !async_stack)
  168. goto out;
  169. } else {
  170. async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
  171. panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
  172. }
  173. lc = pcpu->lowcore;
  174. memcpy(lc, &S390_lowcore, 512);
  175. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  176. lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
  177. lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
  178. lc->cpu_nr = cpu;
  179. lc->spinlock_lockval = arch_spin_lockval(cpu);
  180. if (MACHINE_HAS_VX)
  181. lc->vector_save_area_addr =
  182. (unsigned long) &lc->vector_save_area;
  183. if (vdso_alloc_per_cpu(lc))
  184. goto out;
  185. lowcore_ptr[cpu] = lc;
  186. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  187. return 0;
  188. out:
  189. if (pcpu != &pcpu_devices[0]) {
  190. free_page(panic_stack);
  191. free_pages(async_stack, ASYNC_ORDER);
  192. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  193. }
  194. return -ENOMEM;
  195. }
  196. #ifdef CONFIG_HOTPLUG_CPU
  197. static void pcpu_free_lowcore(struct pcpu *pcpu)
  198. {
  199. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  200. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  201. vdso_free_per_cpu(pcpu->lowcore);
  202. if (pcpu == &pcpu_devices[0])
  203. return;
  204. free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
  205. free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
  206. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  207. }
  208. #endif /* CONFIG_HOTPLUG_CPU */
  209. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  210. {
  211. struct lowcore *lc = pcpu->lowcore;
  212. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  213. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  214. lc->cpu_nr = cpu;
  215. lc->spinlock_lockval = arch_spin_lockval(cpu);
  216. lc->percpu_offset = __per_cpu_offset[cpu];
  217. lc->kernel_asce = S390_lowcore.kernel_asce;
  218. lc->machine_flags = S390_lowcore.machine_flags;
  219. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  220. __ctl_store(lc->cregs_save_area, 0, 15);
  221. save_access_regs((unsigned int *) lc->access_regs_save_area);
  222. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  223. MAX_FACILITY_BIT/8);
  224. }
  225. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  226. {
  227. struct lowcore *lc = pcpu->lowcore;
  228. struct thread_info *ti = task_thread_info(tsk);
  229. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  230. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  231. lc->thread_info = (unsigned long) task_thread_info(tsk);
  232. lc->current_task = (unsigned long) tsk;
  233. lc->lpp = LPP_MAGIC;
  234. lc->current_pid = tsk->pid;
  235. lc->user_timer = ti->user_timer;
  236. lc->system_timer = ti->system_timer;
  237. lc->steal_timer = 0;
  238. }
  239. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  240. {
  241. struct lowcore *lc = pcpu->lowcore;
  242. lc->restart_stack = lc->kernel_stack;
  243. lc->restart_fn = (unsigned long) func;
  244. lc->restart_data = (unsigned long) data;
  245. lc->restart_source = -1UL;
  246. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  247. }
  248. /*
  249. * Call function via PSW restart on pcpu and stop the current cpu.
  250. */
  251. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  252. void *data, unsigned long stack)
  253. {
  254. struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  255. unsigned long source_cpu = stap();
  256. __load_psw_mask(PSW_KERNEL_BITS);
  257. if (pcpu->address == source_cpu)
  258. func(data); /* should not return */
  259. /* Stop target cpu (if func returns this stops the current cpu). */
  260. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  261. /* Restart func on the target cpu and stop the current cpu. */
  262. mem_assign_absolute(lc->restart_stack, stack);
  263. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  264. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  265. mem_assign_absolute(lc->restart_source, source_cpu);
  266. asm volatile(
  267. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  268. " brc 2,0b # busy, try again\n"
  269. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  270. " brc 2,1b # busy, try again\n"
  271. : : "d" (pcpu->address), "d" (source_cpu),
  272. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  273. : "0", "1", "cc");
  274. for (;;) ;
  275. }
  276. /*
  277. * Enable additional logical cpus for multi-threading.
  278. */
  279. static int pcpu_set_smt(unsigned int mtid)
  280. {
  281. int cc;
  282. if (smp_cpu_mtid == mtid)
  283. return 0;
  284. cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
  285. if (cc == 0) {
  286. smp_cpu_mtid = mtid;
  287. smp_cpu_mt_shift = 0;
  288. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  289. smp_cpu_mt_shift++;
  290. pcpu_devices[0].address = stap();
  291. }
  292. return cc;
  293. }
  294. /*
  295. * Call function on an online CPU.
  296. */
  297. void smp_call_online_cpu(void (*func)(void *), void *data)
  298. {
  299. struct pcpu *pcpu;
  300. /* Use the current cpu if it is online. */
  301. pcpu = pcpu_find_address(cpu_online_mask, stap());
  302. if (!pcpu)
  303. /* Use the first online cpu. */
  304. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  305. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  306. }
  307. /*
  308. * Call function on the ipl CPU.
  309. */
  310. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  311. {
  312. pcpu_delegate(&pcpu_devices[0], func, data,
  313. pcpu_devices->lowcore->panic_stack -
  314. PANIC_FRAME_OFFSET + PAGE_SIZE);
  315. }
  316. int smp_find_processor_id(u16 address)
  317. {
  318. int cpu;
  319. for_each_present_cpu(cpu)
  320. if (pcpu_devices[cpu].address == address)
  321. return cpu;
  322. return -1;
  323. }
  324. int smp_vcpu_scheduled(int cpu)
  325. {
  326. return pcpu_running(pcpu_devices + cpu);
  327. }
  328. void smp_yield_cpu(int cpu)
  329. {
  330. if (MACHINE_HAS_DIAG9C) {
  331. diag_stat_inc_norecursion(DIAG_STAT_X09C);
  332. asm volatile("diag %0,0,0x9c"
  333. : : "d" (pcpu_devices[cpu].address));
  334. } else if (MACHINE_HAS_DIAG44) {
  335. diag_stat_inc_norecursion(DIAG_STAT_X044);
  336. asm volatile("diag 0,0,0x44");
  337. }
  338. }
  339. /*
  340. * Send cpus emergency shutdown signal. This gives the cpus the
  341. * opportunity to complete outstanding interrupts.
  342. */
  343. static void smp_emergency_stop(cpumask_t *cpumask)
  344. {
  345. u64 end;
  346. int cpu;
  347. end = get_tod_clock() + (1000000UL << 12);
  348. for_each_cpu(cpu, cpumask) {
  349. struct pcpu *pcpu = pcpu_devices + cpu;
  350. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  351. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  352. 0, NULL) == SIGP_CC_BUSY &&
  353. get_tod_clock() < end)
  354. cpu_relax();
  355. }
  356. while (get_tod_clock() < end) {
  357. for_each_cpu(cpu, cpumask)
  358. if (pcpu_stopped(pcpu_devices + cpu))
  359. cpumask_clear_cpu(cpu, cpumask);
  360. if (cpumask_empty(cpumask))
  361. break;
  362. cpu_relax();
  363. }
  364. }
  365. /*
  366. * Stop all cpus but the current one.
  367. */
  368. void smp_send_stop(void)
  369. {
  370. cpumask_t cpumask;
  371. int cpu;
  372. /* Disable all interrupts/machine checks */
  373. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  374. trace_hardirqs_off();
  375. debug_set_critical();
  376. cpumask_copy(&cpumask, cpu_online_mask);
  377. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  378. if (oops_in_progress)
  379. smp_emergency_stop(&cpumask);
  380. /* stop all processors */
  381. for_each_cpu(cpu, &cpumask) {
  382. struct pcpu *pcpu = pcpu_devices + cpu;
  383. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  384. while (!pcpu_stopped(pcpu))
  385. cpu_relax();
  386. }
  387. }
  388. /*
  389. * This is the main routine where commands issued by other
  390. * cpus are handled.
  391. */
  392. static void smp_handle_ext_call(void)
  393. {
  394. unsigned long bits;
  395. /* handle bit signal external calls */
  396. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  397. if (test_bit(ec_stop_cpu, &bits))
  398. smp_stop_cpu();
  399. if (test_bit(ec_schedule, &bits))
  400. scheduler_ipi();
  401. if (test_bit(ec_call_function_single, &bits))
  402. generic_smp_call_function_single_interrupt();
  403. }
  404. static void do_ext_call_interrupt(struct ext_code ext_code,
  405. unsigned int param32, unsigned long param64)
  406. {
  407. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  408. smp_handle_ext_call();
  409. }
  410. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  411. {
  412. int cpu;
  413. for_each_cpu(cpu, mask)
  414. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  415. }
  416. void arch_send_call_function_single_ipi(int cpu)
  417. {
  418. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  419. }
  420. /*
  421. * this function sends a 'reschedule' IPI to another CPU.
  422. * it goes straight through and wastes no time serializing
  423. * anything. Worst case is that we lose a reschedule ...
  424. */
  425. void smp_send_reschedule(int cpu)
  426. {
  427. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  428. }
  429. /*
  430. * parameter area for the set/clear control bit callbacks
  431. */
  432. struct ec_creg_mask_parms {
  433. unsigned long orval;
  434. unsigned long andval;
  435. int cr;
  436. };
  437. /*
  438. * callback for setting/clearing control bits
  439. */
  440. static void smp_ctl_bit_callback(void *info)
  441. {
  442. struct ec_creg_mask_parms *pp = info;
  443. unsigned long cregs[16];
  444. __ctl_store(cregs, 0, 15);
  445. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  446. __ctl_load(cregs, 0, 15);
  447. }
  448. /*
  449. * Set a bit in a control register of all cpus
  450. */
  451. void smp_ctl_set_bit(int cr, int bit)
  452. {
  453. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  454. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  455. }
  456. EXPORT_SYMBOL(smp_ctl_set_bit);
  457. /*
  458. * Clear a bit in a control register of all cpus
  459. */
  460. void smp_ctl_clear_bit(int cr, int bit)
  461. {
  462. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  463. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  464. }
  465. EXPORT_SYMBOL(smp_ctl_clear_bit);
  466. #ifdef CONFIG_CRASH_DUMP
  467. int smp_store_status(int cpu)
  468. {
  469. struct pcpu *pcpu = pcpu_devices + cpu;
  470. unsigned long pa;
  471. pa = __pa(&pcpu->lowcore->floating_pt_save_area);
  472. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
  473. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  474. return -EIO;
  475. if (!MACHINE_HAS_VX)
  476. return 0;
  477. pa = __pa(pcpu->lowcore->vector_save_area_addr);
  478. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  479. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  480. return -EIO;
  481. return 0;
  482. }
  483. /*
  484. * Collect CPU state of the previous, crashed system.
  485. * There are four cases:
  486. * 1) standard zfcp dump
  487. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  488. * The state for all CPUs except the boot CPU needs to be collected
  489. * with sigp stop-and-store-status. The boot CPU state is located in
  490. * the absolute lowcore of the memory stored in the HSA. The zcore code
  491. * will copy the boot CPU state from the HSA.
  492. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  493. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  494. * The state for all CPUs except the boot CPU needs to be collected
  495. * with sigp stop-and-store-status. The firmware or the boot-loader
  496. * stored the registers of the boot CPU in the absolute lowcore in the
  497. * memory of the old system.
  498. * 3) kdump and the old kernel did not store the CPU state,
  499. * or stand-alone kdump for DASD
  500. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  501. * The state for all CPUs except the boot CPU needs to be collected
  502. * with sigp stop-and-store-status. The kexec code or the boot-loader
  503. * stored the registers of the boot CPU in the memory of the old system.
  504. * 4) kdump and the old kernel stored the CPU state
  505. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  506. * This case does not exist for s390 anymore, setup_arch explicitly
  507. * deactivates the elfcorehdr= kernel parameter
  508. */
  509. static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
  510. bool is_boot_cpu, unsigned long page)
  511. {
  512. __vector128 *vxrs = (__vector128 *) page;
  513. if (is_boot_cpu)
  514. vxrs = boot_cpu_vector_save_area;
  515. else
  516. __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
  517. save_area_add_vxrs(sa, vxrs);
  518. }
  519. static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
  520. bool is_boot_cpu, unsigned long page)
  521. {
  522. void *regs = (void *) page;
  523. if (is_boot_cpu)
  524. copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
  525. else
  526. __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
  527. save_area_add_regs(sa, regs);
  528. }
  529. void __init smp_save_dump_cpus(void)
  530. {
  531. int addr, boot_cpu_addr, max_cpu_addr;
  532. struct save_area *sa;
  533. unsigned long page;
  534. bool is_boot_cpu;
  535. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  536. /* No previous system present, normal boot. */
  537. return;
  538. /* Allocate a page as dumping area for the store status sigps */
  539. page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
  540. /* Set multi-threading state to the previous system. */
  541. pcpu_set_smt(sclp.mtid_prev);
  542. boot_cpu_addr = stap();
  543. max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
  544. for (addr = 0; addr <= max_cpu_addr; addr++) {
  545. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
  546. SIGP_CC_NOT_OPERATIONAL)
  547. continue;
  548. is_boot_cpu = (addr == boot_cpu_addr);
  549. /* Allocate save area */
  550. sa = save_area_alloc(is_boot_cpu);
  551. if (!sa)
  552. panic("could not allocate memory for save area\n");
  553. if (MACHINE_HAS_VX)
  554. /* Get the vector registers */
  555. smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
  556. /*
  557. * For a zfcp dump OLDMEM_BASE == NULL and the registers
  558. * of the boot CPU are stored in the HSA. To retrieve
  559. * these registers an SCLP request is required which is
  560. * done by drivers/s390/char/zcore.c:init_cpu_info()
  561. */
  562. if (!is_boot_cpu || OLDMEM_BASE)
  563. /* Get the CPU registers */
  564. smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
  565. }
  566. memblock_free(page, PAGE_SIZE);
  567. diag308_reset();
  568. pcpu_set_smt(0);
  569. }
  570. #endif /* CONFIG_CRASH_DUMP */
  571. void smp_cpu_set_polarization(int cpu, int val)
  572. {
  573. pcpu_devices[cpu].polarization = val;
  574. }
  575. int smp_cpu_get_polarization(int cpu)
  576. {
  577. return pcpu_devices[cpu].polarization;
  578. }
  579. static struct sclp_core_info *smp_get_core_info(void)
  580. {
  581. static int use_sigp_detection;
  582. struct sclp_core_info *info;
  583. int address;
  584. info = kzalloc(sizeof(*info), GFP_KERNEL);
  585. if (info && (use_sigp_detection || sclp_get_core_info(info))) {
  586. use_sigp_detection = 1;
  587. for (address = 0;
  588. address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
  589. address += (1U << smp_cpu_mt_shift)) {
  590. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
  591. SIGP_CC_NOT_OPERATIONAL)
  592. continue;
  593. info->core[info->configured].core_id =
  594. address >> smp_cpu_mt_shift;
  595. info->configured++;
  596. }
  597. info->combined = info->configured;
  598. }
  599. return info;
  600. }
  601. static int smp_add_present_cpu(int cpu);
  602. static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
  603. {
  604. struct pcpu *pcpu;
  605. cpumask_t avail;
  606. int cpu, nr, i, j;
  607. u16 address;
  608. nr = 0;
  609. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  610. cpu = cpumask_first(&avail);
  611. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  612. if (sclp.has_core_type && info->core[i].type != boot_core_type)
  613. continue;
  614. address = info->core[i].core_id << smp_cpu_mt_shift;
  615. for (j = 0; j <= smp_cpu_mtid; j++) {
  616. if (pcpu_find_address(cpu_present_mask, address + j))
  617. continue;
  618. pcpu = pcpu_devices + cpu;
  619. pcpu->address = address + j;
  620. pcpu->state =
  621. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  622. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  623. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  624. set_cpu_present(cpu, true);
  625. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  626. set_cpu_present(cpu, false);
  627. else
  628. nr++;
  629. cpu = cpumask_next(cpu, &avail);
  630. if (cpu >= nr_cpu_ids)
  631. break;
  632. }
  633. }
  634. return nr;
  635. }
  636. static void __init smp_detect_cpus(void)
  637. {
  638. unsigned int cpu, mtid, c_cpus, s_cpus;
  639. struct sclp_core_info *info;
  640. u16 address;
  641. /* Get CPU information */
  642. info = smp_get_core_info();
  643. if (!info)
  644. panic("smp_detect_cpus failed to allocate memory\n");
  645. /* Find boot CPU type */
  646. if (sclp.has_core_type) {
  647. address = stap();
  648. for (cpu = 0; cpu < info->combined; cpu++)
  649. if (info->core[cpu].core_id == address) {
  650. /* The boot cpu dictates the cpu type. */
  651. boot_core_type = info->core[cpu].type;
  652. break;
  653. }
  654. if (cpu >= info->combined)
  655. panic("Could not find boot CPU type");
  656. }
  657. /* Set multi-threading state for the current system */
  658. mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
  659. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  660. pcpu_set_smt(mtid);
  661. /* Print number of CPUs */
  662. c_cpus = s_cpus = 0;
  663. for (cpu = 0; cpu < info->combined; cpu++) {
  664. if (sclp.has_core_type &&
  665. info->core[cpu].type != boot_core_type)
  666. continue;
  667. if (cpu < info->configured)
  668. c_cpus += smp_cpu_mtid + 1;
  669. else
  670. s_cpus += smp_cpu_mtid + 1;
  671. }
  672. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  673. /* Add CPUs present at boot */
  674. get_online_cpus();
  675. __smp_rescan_cpus(info, 0);
  676. put_online_cpus();
  677. kfree(info);
  678. }
  679. /*
  680. * Activate a secondary processor.
  681. */
  682. static void smp_start_secondary(void *cpuvoid)
  683. {
  684. S390_lowcore.last_update_clock = get_tod_clock();
  685. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  686. S390_lowcore.restart_fn = (unsigned long) do_restart;
  687. S390_lowcore.restart_data = 0;
  688. S390_lowcore.restart_source = -1UL;
  689. restore_access_regs(S390_lowcore.access_regs_save_area);
  690. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  691. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  692. cpu_init();
  693. preempt_disable();
  694. init_cpu_timer();
  695. vtime_init();
  696. pfault_init();
  697. notify_cpu_starting(smp_processor_id());
  698. set_cpu_online(smp_processor_id(), true);
  699. inc_irq_stat(CPU_RST);
  700. local_irq_enable();
  701. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  702. }
  703. /* Upping and downing of CPUs */
  704. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  705. {
  706. struct pcpu *pcpu;
  707. int base, i, rc;
  708. pcpu = pcpu_devices + cpu;
  709. if (pcpu->state != CPU_STATE_CONFIGURED)
  710. return -EIO;
  711. base = cpu - (cpu % (smp_cpu_mtid + 1));
  712. for (i = 0; i <= smp_cpu_mtid; i++) {
  713. if (base + i < nr_cpu_ids)
  714. if (cpu_online(base + i))
  715. break;
  716. }
  717. /*
  718. * If this is the first CPU of the core to get online
  719. * do an initial CPU reset.
  720. */
  721. if (i > smp_cpu_mtid &&
  722. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  723. SIGP_CC_ORDER_CODE_ACCEPTED)
  724. return -EIO;
  725. rc = pcpu_alloc_lowcore(pcpu, cpu);
  726. if (rc)
  727. return rc;
  728. pcpu_prepare_secondary(pcpu, cpu);
  729. pcpu_attach_task(pcpu, tidle);
  730. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  731. /* Wait until cpu puts itself in the online & active maps */
  732. while (!cpu_online(cpu))
  733. cpu_relax();
  734. return 0;
  735. }
  736. static unsigned int setup_possible_cpus __initdata;
  737. static int __init _setup_possible_cpus(char *s)
  738. {
  739. get_option(&s, &setup_possible_cpus);
  740. return 0;
  741. }
  742. early_param("possible_cpus", _setup_possible_cpus);
  743. #ifdef CONFIG_HOTPLUG_CPU
  744. int __cpu_disable(void)
  745. {
  746. unsigned long cregs[16];
  747. /* Handle possible pending IPIs */
  748. smp_handle_ext_call();
  749. set_cpu_online(smp_processor_id(), false);
  750. /* Disable pseudo page faults on this cpu. */
  751. pfault_fini();
  752. /* Disable interrupt sources via control register. */
  753. __ctl_store(cregs, 0, 15);
  754. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  755. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  756. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  757. __ctl_load(cregs, 0, 15);
  758. clear_cpu_flag(CIF_NOHZ_DELAY);
  759. return 0;
  760. }
  761. void __cpu_die(unsigned int cpu)
  762. {
  763. struct pcpu *pcpu;
  764. /* Wait until target cpu is down */
  765. pcpu = pcpu_devices + cpu;
  766. while (!pcpu_stopped(pcpu))
  767. cpu_relax();
  768. pcpu_free_lowcore(pcpu);
  769. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  770. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  771. }
  772. void __noreturn cpu_die(void)
  773. {
  774. idle_task_exit();
  775. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  776. for (;;) ;
  777. }
  778. #endif /* CONFIG_HOTPLUG_CPU */
  779. void __init smp_fill_possible_mask(void)
  780. {
  781. unsigned int possible, sclp_max, cpu;
  782. sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
  783. sclp_max = min(smp_max_threads, sclp_max);
  784. sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
  785. possible = setup_possible_cpus ?: nr_cpu_ids;
  786. possible = min(possible, sclp_max);
  787. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  788. set_cpu_possible(cpu, true);
  789. }
  790. void __init smp_prepare_cpus(unsigned int max_cpus)
  791. {
  792. /* request the 0x1201 emergency signal external interrupt */
  793. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  794. panic("Couldn't request external interrupt 0x1201");
  795. /* request the 0x1202 external call external interrupt */
  796. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  797. panic("Couldn't request external interrupt 0x1202");
  798. smp_detect_cpus();
  799. }
  800. void __init smp_prepare_boot_cpu(void)
  801. {
  802. struct pcpu *pcpu = pcpu_devices;
  803. pcpu->state = CPU_STATE_CONFIGURED;
  804. pcpu->address = stap();
  805. pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
  806. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  807. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  808. set_cpu_present(0, true);
  809. set_cpu_online(0, true);
  810. }
  811. void __init smp_cpus_done(unsigned int max_cpus)
  812. {
  813. }
  814. void __init smp_setup_processor_id(void)
  815. {
  816. S390_lowcore.cpu_nr = 0;
  817. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  818. }
  819. /*
  820. * the frequency of the profiling timer can be changed
  821. * by writing a multiplier value into /proc/profile.
  822. *
  823. * usually you want to run this on all CPUs ;)
  824. */
  825. int setup_profiling_timer(unsigned int multiplier)
  826. {
  827. return 0;
  828. }
  829. #ifdef CONFIG_HOTPLUG_CPU
  830. static ssize_t cpu_configure_show(struct device *dev,
  831. struct device_attribute *attr, char *buf)
  832. {
  833. ssize_t count;
  834. mutex_lock(&smp_cpu_state_mutex);
  835. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  836. mutex_unlock(&smp_cpu_state_mutex);
  837. return count;
  838. }
  839. static ssize_t cpu_configure_store(struct device *dev,
  840. struct device_attribute *attr,
  841. const char *buf, size_t count)
  842. {
  843. struct pcpu *pcpu;
  844. int cpu, val, rc, i;
  845. char delim;
  846. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  847. return -EINVAL;
  848. if (val != 0 && val != 1)
  849. return -EINVAL;
  850. get_online_cpus();
  851. mutex_lock(&smp_cpu_state_mutex);
  852. rc = -EBUSY;
  853. /* disallow configuration changes of online cpus and cpu 0 */
  854. cpu = dev->id;
  855. cpu -= cpu % (smp_cpu_mtid + 1);
  856. if (cpu == 0)
  857. goto out;
  858. for (i = 0; i <= smp_cpu_mtid; i++)
  859. if (cpu_online(cpu + i))
  860. goto out;
  861. pcpu = pcpu_devices + cpu;
  862. rc = 0;
  863. switch (val) {
  864. case 0:
  865. if (pcpu->state != CPU_STATE_CONFIGURED)
  866. break;
  867. rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  868. if (rc)
  869. break;
  870. for (i = 0; i <= smp_cpu_mtid; i++) {
  871. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  872. continue;
  873. pcpu[i].state = CPU_STATE_STANDBY;
  874. smp_cpu_set_polarization(cpu + i,
  875. POLARIZATION_UNKNOWN);
  876. }
  877. topology_expect_change();
  878. break;
  879. case 1:
  880. if (pcpu->state != CPU_STATE_STANDBY)
  881. break;
  882. rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
  883. if (rc)
  884. break;
  885. for (i = 0; i <= smp_cpu_mtid; i++) {
  886. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  887. continue;
  888. pcpu[i].state = CPU_STATE_CONFIGURED;
  889. smp_cpu_set_polarization(cpu + i,
  890. POLARIZATION_UNKNOWN);
  891. }
  892. topology_expect_change();
  893. break;
  894. default:
  895. break;
  896. }
  897. out:
  898. mutex_unlock(&smp_cpu_state_mutex);
  899. put_online_cpus();
  900. return rc ? rc : count;
  901. }
  902. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  903. #endif /* CONFIG_HOTPLUG_CPU */
  904. static ssize_t show_cpu_address(struct device *dev,
  905. struct device_attribute *attr, char *buf)
  906. {
  907. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  908. }
  909. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  910. static struct attribute *cpu_common_attrs[] = {
  911. #ifdef CONFIG_HOTPLUG_CPU
  912. &dev_attr_configure.attr,
  913. #endif
  914. &dev_attr_address.attr,
  915. NULL,
  916. };
  917. static struct attribute_group cpu_common_attr_group = {
  918. .attrs = cpu_common_attrs,
  919. };
  920. static struct attribute *cpu_online_attrs[] = {
  921. &dev_attr_idle_count.attr,
  922. &dev_attr_idle_time_us.attr,
  923. NULL,
  924. };
  925. static struct attribute_group cpu_online_attr_group = {
  926. .attrs = cpu_online_attrs,
  927. };
  928. static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
  929. void *hcpu)
  930. {
  931. unsigned int cpu = (unsigned int)(long)hcpu;
  932. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  933. int err = 0;
  934. switch (action & ~CPU_TASKS_FROZEN) {
  935. case CPU_ONLINE:
  936. err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  937. break;
  938. case CPU_DEAD:
  939. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  940. break;
  941. }
  942. return notifier_from_errno(err);
  943. }
  944. static int smp_add_present_cpu(int cpu)
  945. {
  946. struct device *s;
  947. struct cpu *c;
  948. int rc;
  949. c = kzalloc(sizeof(*c), GFP_KERNEL);
  950. if (!c)
  951. return -ENOMEM;
  952. per_cpu(cpu_device, cpu) = c;
  953. s = &c->dev;
  954. c->hotpluggable = 1;
  955. rc = register_cpu(c, cpu);
  956. if (rc)
  957. goto out;
  958. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  959. if (rc)
  960. goto out_cpu;
  961. if (cpu_online(cpu)) {
  962. rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  963. if (rc)
  964. goto out_online;
  965. }
  966. rc = topology_cpu_init(c);
  967. if (rc)
  968. goto out_topology;
  969. return 0;
  970. out_topology:
  971. if (cpu_online(cpu))
  972. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  973. out_online:
  974. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  975. out_cpu:
  976. #ifdef CONFIG_HOTPLUG_CPU
  977. unregister_cpu(c);
  978. #endif
  979. out:
  980. return rc;
  981. }
  982. #ifdef CONFIG_HOTPLUG_CPU
  983. int __ref smp_rescan_cpus(void)
  984. {
  985. struct sclp_core_info *info;
  986. int nr;
  987. info = smp_get_core_info();
  988. if (!info)
  989. return -ENOMEM;
  990. get_online_cpus();
  991. mutex_lock(&smp_cpu_state_mutex);
  992. nr = __smp_rescan_cpus(info, 1);
  993. mutex_unlock(&smp_cpu_state_mutex);
  994. put_online_cpus();
  995. kfree(info);
  996. if (nr)
  997. topology_schedule_update();
  998. return 0;
  999. }
  1000. static ssize_t __ref rescan_store(struct device *dev,
  1001. struct device_attribute *attr,
  1002. const char *buf,
  1003. size_t count)
  1004. {
  1005. int rc;
  1006. rc = smp_rescan_cpus();
  1007. return rc ? rc : count;
  1008. }
  1009. static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
  1010. #endif /* CONFIG_HOTPLUG_CPU */
  1011. static int __init s390_smp_init(void)
  1012. {
  1013. int cpu, rc = 0;
  1014. #ifdef CONFIG_HOTPLUG_CPU
  1015. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1016. if (rc)
  1017. return rc;
  1018. #endif
  1019. cpu_notifier_register_begin();
  1020. for_each_present_cpu(cpu) {
  1021. rc = smp_add_present_cpu(cpu);
  1022. if (rc)
  1023. goto out;
  1024. }
  1025. __hotcpu_notifier(smp_cpu_notify, 0);
  1026. out:
  1027. cpu_notifier_register_done();
  1028. return rc;
  1029. }
  1030. subsys_initcall(s390_smp_init);