pci.h 4.3 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. */
  6. #ifndef _ASM_PCI_H
  7. #define _ASM_PCI_H
  8. #include <linux/mm.h>
  9. #ifdef __KERNEL__
  10. /*
  11. * This file essentially defines the interface between board
  12. * specific PCI code and MIPS common PCI code. Should potentially put
  13. * into include/asm/pci.h file.
  14. */
  15. #include <linux/ioport.h>
  16. #include <linux/list.h>
  17. #include <linux/of.h>
  18. #ifdef CONFIG_PCI_DRIVERS_LEGACY
  19. /*
  20. * Each pci channel is a top-level PCI bus seem by CPU. A machine with
  21. * multiple PCI channels may have multiple PCI host controllers or a
  22. * single controller supporting multiple channels.
  23. */
  24. struct pci_controller {
  25. struct list_head list;
  26. struct pci_bus *bus;
  27. struct device_node *of_node;
  28. struct pci_ops *pci_ops;
  29. struct resource *mem_resource;
  30. unsigned long mem_offset;
  31. struct resource *io_resource;
  32. unsigned long io_offset;
  33. unsigned long io_map_base;
  34. struct resource *busn_resource;
  35. unsigned long busn_offset;
  36. #ifndef CONFIG_PCI_DOMAINS_GENERIC
  37. unsigned int index;
  38. /* For compatibility with current (as of July 2003) pciutils
  39. and XFree86. Eventually will be removed. */
  40. unsigned int need_domain_info;
  41. #endif
  42. /* Optional access methods for reading/writing the bus number
  43. of the PCI controller */
  44. int (*get_busno)(void);
  45. void (*set_busno)(int busno);
  46. };
  47. /*
  48. * Used by boards to register their PCI busses before the actual scanning.
  49. */
  50. extern void register_pci_controller(struct pci_controller *hose);
  51. /*
  52. * board supplied pci irq fixup routine
  53. */
  54. extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
  55. /* Do platform specific device initialization at pci_enable_device() time */
  56. extern int pcibios_plat_dev_init(struct pci_dev *dev);
  57. extern char * (*pcibios_plat_setup)(char *str);
  58. #ifdef CONFIG_OF
  59. /* this function parses memory ranges from a device node */
  60. extern void pci_load_of_ranges(struct pci_controller *hose,
  61. struct device_node *node);
  62. #else
  63. static inline void pci_load_of_ranges(struct pci_controller *hose,
  64. struct device_node *node) {}
  65. #endif
  66. #ifdef CONFIG_PCI_DOMAINS_GENERIC
  67. static inline void set_pci_need_domain_info(struct pci_controller *hose,
  68. int need_domain_info)
  69. {
  70. /* nothing to do */
  71. }
  72. #elif defined(CONFIG_PCI_DOMAINS)
  73. static inline void set_pci_need_domain_info(struct pci_controller *hose,
  74. int need_domain_info)
  75. {
  76. hose->need_domain_info = need_domain_info;
  77. }
  78. #endif /* CONFIG_PCI_DOMAINS */
  79. #endif
  80. /* Can be used to override the logic in pci_scan_bus for skipping
  81. already-configured bus numbers - to be used for buggy BIOSes
  82. or architectures with incomplete PCI setup by the loader */
  83. static inline unsigned int pcibios_assign_all_busses(void)
  84. {
  85. return 1;
  86. }
  87. extern unsigned long PCIBIOS_MIN_IO;
  88. extern unsigned long PCIBIOS_MIN_MEM;
  89. #define PCIBIOS_MIN_CARDBUS_IO 0x4000
  90. extern void pcibios_set_master(struct pci_dev *dev);
  91. #define HAVE_PCI_MMAP
  92. extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
  93. enum pci_mmap_state mmap_state, int write_combine);
  94. #define HAVE_ARCH_PCI_RESOURCE_TO_USER
  95. /*
  96. * Dynamic DMA mapping stuff.
  97. * MIPS has everything mapped statically.
  98. */
  99. #include <linux/types.h>
  100. #include <linux/slab.h>
  101. #include <linux/scatterlist.h>
  102. #include <linux/string.h>
  103. #include <asm/io.h>
  104. struct pci_dev;
  105. /*
  106. * The PCI address space does equal the physical memory address space.
  107. * The networking and block device layers use this boolean for bounce
  108. * buffer decisions.
  109. */
  110. #define PCI_DMA_BUS_IS_PHYS (1)
  111. #ifdef CONFIG_PCI_DOMAINS_GENERIC
  112. static inline int pci_proc_domain(struct pci_bus *bus)
  113. {
  114. return pci_domain_nr(bus);
  115. }
  116. #elif defined(CONFIG_PCI_DOMAINS)
  117. #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
  118. static inline int pci_proc_domain(struct pci_bus *bus)
  119. {
  120. struct pci_controller *hose = bus->sysdata;
  121. return hose->need_domain_info;
  122. }
  123. #endif /* CONFIG_PCI_DOMAINS */
  124. #endif /* __KERNEL__ */
  125. /* Do platform specific device initialization at pci_enable_device() time */
  126. extern int pcibios_plat_dev_init(struct pci_dev *dev);
  127. /* Chances are this interrupt is wired PC-style ... */
  128. static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
  129. {
  130. return channel ? 15 : 14;
  131. }
  132. #endif /* _ASM_PCI_H */