inject_fault.c 6.5 KB

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  1. /*
  2. * Fault injection for both 32 and 64bit guests.
  3. *
  4. * Copyright (C) 2012,2013 - ARM Ltd
  5. * Author: Marc Zyngier <marc.zyngier@arm.com>
  6. *
  7. * Based on arch/arm/kvm/emulate.c
  8. * Copyright (C) 2012 - Virtual Open Systems and Columbia University
  9. * Author: Christoffer Dall <c.dall@virtualopensystems.com>
  10. *
  11. * This program is free software: you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  22. */
  23. #include <linux/kvm_host.h>
  24. #include <asm/kvm_emulate.h>
  25. #include <asm/esr.h>
  26. #define PSTATE_FAULT_BITS_64 (PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
  27. PSR_I_BIT | PSR_D_BIT)
  28. #define CURRENT_EL_SP_EL0_VECTOR 0x0
  29. #define CURRENT_EL_SP_ELx_VECTOR 0x200
  30. #define LOWER_EL_AArch64_VECTOR 0x400
  31. #define LOWER_EL_AArch32_VECTOR 0x600
  32. static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
  33. {
  34. unsigned long cpsr;
  35. unsigned long new_spsr_value = *vcpu_cpsr(vcpu);
  36. bool is_thumb = (new_spsr_value & COMPAT_PSR_T_BIT);
  37. u32 return_offset = (is_thumb) ? 4 : 0;
  38. u32 sctlr = vcpu_cp15(vcpu, c1_SCTLR);
  39. cpsr = mode | COMPAT_PSR_I_BIT;
  40. if (sctlr & (1 << 30))
  41. cpsr |= COMPAT_PSR_T_BIT;
  42. if (sctlr & (1 << 25))
  43. cpsr |= COMPAT_PSR_E_BIT;
  44. *vcpu_cpsr(vcpu) = cpsr;
  45. /* Note: These now point to the banked copies */
  46. *vcpu_spsr(vcpu) = new_spsr_value;
  47. *vcpu_reg32(vcpu, 14) = *vcpu_pc(vcpu) + return_offset;
  48. /* Branch to exception vector */
  49. if (sctlr & (1 << 13))
  50. vect_offset += 0xffff0000;
  51. else /* always have security exceptions */
  52. vect_offset += vcpu_cp15(vcpu, c12_VBAR);
  53. *vcpu_pc(vcpu) = vect_offset;
  54. }
  55. static void inject_undef32(struct kvm_vcpu *vcpu)
  56. {
  57. prepare_fault32(vcpu, COMPAT_PSR_MODE_UND, 4);
  58. }
  59. /*
  60. * Modelled after TakeDataAbortException() and TakePrefetchAbortException
  61. * pseudocode.
  62. */
  63. static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt,
  64. unsigned long addr)
  65. {
  66. u32 vect_offset;
  67. u32 *far, *fsr;
  68. bool is_lpae;
  69. if (is_pabt) {
  70. vect_offset = 12;
  71. far = &vcpu_cp15(vcpu, c6_IFAR);
  72. fsr = &vcpu_cp15(vcpu, c5_IFSR);
  73. } else { /* !iabt */
  74. vect_offset = 16;
  75. far = &vcpu_cp15(vcpu, c6_DFAR);
  76. fsr = &vcpu_cp15(vcpu, c5_DFSR);
  77. }
  78. prepare_fault32(vcpu, COMPAT_PSR_MODE_ABT | COMPAT_PSR_A_BIT, vect_offset);
  79. *far = addr;
  80. /* Give the guest an IMPLEMENTATION DEFINED exception */
  81. is_lpae = (vcpu_cp15(vcpu, c2_TTBCR) >> 31);
  82. if (is_lpae)
  83. *fsr = 1 << 9 | 0x34;
  84. else
  85. *fsr = 0x14;
  86. }
  87. enum exception_type {
  88. except_type_sync = 0,
  89. except_type_irq = 0x80,
  90. except_type_fiq = 0x100,
  91. except_type_serror = 0x180,
  92. };
  93. static u64 get_except_vector(struct kvm_vcpu *vcpu, enum exception_type type)
  94. {
  95. u64 exc_offset;
  96. switch (*vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
  97. case PSR_MODE_EL1t:
  98. exc_offset = CURRENT_EL_SP_EL0_VECTOR;
  99. break;
  100. case PSR_MODE_EL1h:
  101. exc_offset = CURRENT_EL_SP_ELx_VECTOR;
  102. break;
  103. case PSR_MODE_EL0t:
  104. exc_offset = LOWER_EL_AArch64_VECTOR;
  105. break;
  106. default:
  107. exc_offset = LOWER_EL_AArch32_VECTOR;
  108. }
  109. return vcpu_sys_reg(vcpu, VBAR_EL1) + exc_offset + type;
  110. }
  111. static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr)
  112. {
  113. unsigned long cpsr = *vcpu_cpsr(vcpu);
  114. bool is_aarch32 = vcpu_mode_is_32bit(vcpu);
  115. u32 esr = 0;
  116. *vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
  117. *vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
  118. *vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
  119. *vcpu_spsr(vcpu) = cpsr;
  120. vcpu_sys_reg(vcpu, FAR_EL1) = addr;
  121. /*
  122. * Build an {i,d}abort, depending on the level and the
  123. * instruction set. Report an external synchronous abort.
  124. */
  125. if (kvm_vcpu_trap_il_is32bit(vcpu))
  126. esr |= ESR_ELx_IL;
  127. /*
  128. * Here, the guest runs in AArch64 mode when in EL1. If we get
  129. * an AArch32 fault, it means we managed to trap an EL0 fault.
  130. */
  131. if (is_aarch32 || (cpsr & PSR_MODE_MASK) == PSR_MODE_EL0t)
  132. esr |= (ESR_ELx_EC_IABT_LOW << ESR_ELx_EC_SHIFT);
  133. else
  134. esr |= (ESR_ELx_EC_IABT_CUR << ESR_ELx_EC_SHIFT);
  135. if (!is_iabt)
  136. esr |= ESR_ELx_EC_DABT_LOW << ESR_ELx_EC_SHIFT;
  137. vcpu_sys_reg(vcpu, ESR_EL1) = esr | ESR_ELx_FSC_EXTABT;
  138. }
  139. static void inject_undef64(struct kvm_vcpu *vcpu)
  140. {
  141. unsigned long cpsr = *vcpu_cpsr(vcpu);
  142. u32 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
  143. *vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
  144. *vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
  145. *vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
  146. *vcpu_spsr(vcpu) = cpsr;
  147. /*
  148. * Build an unknown exception, depending on the instruction
  149. * set.
  150. */
  151. if (kvm_vcpu_trap_il_is32bit(vcpu))
  152. esr |= ESR_ELx_IL;
  153. vcpu_sys_reg(vcpu, ESR_EL1) = esr;
  154. }
  155. /**
  156. * kvm_inject_dabt - inject a data abort into the guest
  157. * @vcpu: The VCPU to receive the undefined exception
  158. * @addr: The address to report in the DFAR
  159. *
  160. * It is assumed that this code is called from the VCPU thread and that the
  161. * VCPU therefore is not currently executing guest code.
  162. */
  163. void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr)
  164. {
  165. if (!(vcpu->arch.hcr_el2 & HCR_RW))
  166. inject_abt32(vcpu, false, addr);
  167. else
  168. inject_abt64(vcpu, false, addr);
  169. }
  170. /**
  171. * kvm_inject_pabt - inject a prefetch abort into the guest
  172. * @vcpu: The VCPU to receive the undefined exception
  173. * @addr: The address to report in the DFAR
  174. *
  175. * It is assumed that this code is called from the VCPU thread and that the
  176. * VCPU therefore is not currently executing guest code.
  177. */
  178. void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr)
  179. {
  180. if (!(vcpu->arch.hcr_el2 & HCR_RW))
  181. inject_abt32(vcpu, true, addr);
  182. else
  183. inject_abt64(vcpu, true, addr);
  184. }
  185. /**
  186. * kvm_inject_undefined - inject an undefined instruction into the guest
  187. *
  188. * It is assumed that this code is called from the VCPU thread and that the
  189. * VCPU therefore is not currently executing guest code.
  190. */
  191. void kvm_inject_undefined(struct kvm_vcpu *vcpu)
  192. {
  193. if (!(vcpu->arch.hcr_el2 & HCR_RW))
  194. inject_undef32(vcpu);
  195. else
  196. inject_undef64(vcpu);
  197. }
  198. /**
  199. * kvm_inject_vabt - inject an async abort / SError into the guest
  200. * @vcpu: The VCPU to receive the exception
  201. *
  202. * It is assumed that this code is called from the VCPU thread and that the
  203. * VCPU therefore is not currently executing guest code.
  204. */
  205. void kvm_inject_vabt(struct kvm_vcpu *vcpu)
  206. {
  207. vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) | HCR_VSE);
  208. }