barrier.h 3.3 KB

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  1. /*
  2. * Based on arch/arm/include/asm/barrier.h
  3. *
  4. * Copyright (C) 2012 ARM Ltd.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #ifndef __ASM_BARRIER_H
  19. #define __ASM_BARRIER_H
  20. #ifndef __ASSEMBLY__
  21. #define __nops(n) ".rept " #n "\nnop\n.endr\n"
  22. #define nops(n) asm volatile(__nops(n))
  23. #define sev() asm volatile("sev" : : : "memory")
  24. #define wfe() asm volatile("wfe" : : : "memory")
  25. #define wfi() asm volatile("wfi" : : : "memory")
  26. #define isb() asm volatile("isb" : : : "memory")
  27. #define dmb(opt) asm volatile("dmb " #opt : : : "memory")
  28. #define dsb(opt) asm volatile("dsb " #opt : : : "memory")
  29. #define mb() dsb(sy)
  30. #define rmb() dsb(ld)
  31. #define wmb() dsb(st)
  32. #define dma_rmb() dmb(oshld)
  33. #define dma_wmb() dmb(oshst)
  34. #define __smp_mb() dmb(ish)
  35. #define __smp_rmb() dmb(ishld)
  36. #define __smp_wmb() dmb(ishst)
  37. #define __smp_store_release(p, v) \
  38. do { \
  39. union { typeof(*p) __val; char __c[1]; } __u = \
  40. { .__val = (__force typeof(*p)) (v) }; \
  41. compiletime_assert_atomic_type(*p); \
  42. switch (sizeof(*p)) { \
  43. case 1: \
  44. asm volatile ("stlrb %w1, %0" \
  45. : "=Q" (*p) \
  46. : "r" (*(__u8 *)__u.__c) \
  47. : "memory"); \
  48. break; \
  49. case 2: \
  50. asm volatile ("stlrh %w1, %0" \
  51. : "=Q" (*p) \
  52. : "r" (*(__u16 *)__u.__c) \
  53. : "memory"); \
  54. break; \
  55. case 4: \
  56. asm volatile ("stlr %w1, %0" \
  57. : "=Q" (*p) \
  58. : "r" (*(__u32 *)__u.__c) \
  59. : "memory"); \
  60. break; \
  61. case 8: \
  62. asm volatile ("stlr %1, %0" \
  63. : "=Q" (*p) \
  64. : "r" (*(__u64 *)__u.__c) \
  65. : "memory"); \
  66. break; \
  67. } \
  68. } while (0)
  69. #define __smp_load_acquire(p) \
  70. ({ \
  71. union { typeof(*p) __val; char __c[1]; } __u; \
  72. compiletime_assert_atomic_type(*p); \
  73. switch (sizeof(*p)) { \
  74. case 1: \
  75. asm volatile ("ldarb %w0, %1" \
  76. : "=r" (*(__u8 *)__u.__c) \
  77. : "Q" (*p) : "memory"); \
  78. break; \
  79. case 2: \
  80. asm volatile ("ldarh %w0, %1" \
  81. : "=r" (*(__u16 *)__u.__c) \
  82. : "Q" (*p) : "memory"); \
  83. break; \
  84. case 4: \
  85. asm volatile ("ldar %w0, %1" \
  86. : "=r" (*(__u32 *)__u.__c) \
  87. : "Q" (*p) : "memory"); \
  88. break; \
  89. case 8: \
  90. asm volatile ("ldar %0, %1" \
  91. : "=r" (*(__u64 *)__u.__c) \
  92. : "Q" (*p) : "memory"); \
  93. break; \
  94. } \
  95. __u.__val; \
  96. })
  97. #define smp_cond_load_acquire(ptr, cond_expr) \
  98. ({ \
  99. typeof(ptr) __PTR = (ptr); \
  100. typeof(*ptr) VAL; \
  101. for (;;) { \
  102. VAL = smp_load_acquire(__PTR); \
  103. if (cond_expr) \
  104. break; \
  105. __cmpwait_relaxed(__PTR, VAL); \
  106. } \
  107. VAL; \
  108. })
  109. #include <asm-generic/barrier.h>
  110. #endif /* __ASSEMBLY__ */
  111. #endif /* __ASM_BARRIER_H */