rockchip-i2s.txt 1.6 KB

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  1. * Rockchip I2S controller
  2. The I2S bus (Inter-IC sound bus) is a serial link for digital
  3. audio data transfer between devices in the system.
  4. Required properties:
  5. - compatible: should be one of the followings
  6. - "rockchip,rk3066-i2s": for rk3066
  7. - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
  8. - "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
  9. - "rockchip,rk3399-i2s", "rockchip,rk3066-i2s": for rk3399
  10. - reg: physical base address of the controller and length of memory mapped
  11. region.
  12. - interrupts: should contain the I2S interrupt.
  13. - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
  14. Documentation/devicetree/bindings/dma/dma.txt
  15. - dma-names: should include "tx" and "rx".
  16. - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
  17. - clock-names: should contain followings:
  18. - "i2s_hclk": clock for I2S BUS
  19. - "i2s_clk" : clock for I2S controller
  20. - rockchip,playback-channels: max playback channels, if not set, 8 channels default.
  21. - rockchip,capture-channels: max capture channels, if not set, 2 channels default.
  22. Required properties for controller which support multi channels
  23. playback/capture:
  24. - rockchip,grf: the phandle of the syscon node for GRF register.
  25. Example for rk3288 I2S controller:
  26. i2s@ff890000 {
  27. compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
  28. reg = <0xff890000 0x10000>;
  29. interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  30. dmas = <&pdma1 0>, <&pdma1 1>;
  31. dma-names = "tx", "rx";
  32. clock-names = "i2s_hclk", "i2s_clk";
  33. clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
  34. rockchip,playback-channels = <8>;
  35. rockchip,capture-channels = <2>;
  36. };