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- TI PCI Controllers
- PCIe Designware Controller
- - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
- Should be "ti,dra7-pcie-ep" for EP (deprecated)
- Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
- Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
- Should be "ti,dra726-pcie-rc" for dra72x in RC mode
- Should be "ti,dra726-pcie-ep" for dra72x in EP mode
- - phys : list of PHY specifiers (used by generic PHY framework)
- - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
- number of PHYs as specified in *phys* property.
- - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
- where <X> is the instance number of the pcie from the HW spec.
- - num-lanes as specified in ../designware-pcie.txt
- - syscon-lane-conf : phandle/offset pair. Phandle to the system control module and the
- register offset to specify 1 lane or 2 lane.
- - syscon-lane-sel : phandle/offset pair. Phandle to the system control module and the
- register offset to specify lane selection.
- HOST MODE
- =========
- - reg : Two register ranges as listed in the reg-names property
- - reg-names : The first entry must be "ti-conf" for the TI specific registers
- The second entry must be "rc-dbics" for the designware pcie
- registers
- The third entry must be "config" for the PCIe configuration space
- - interrupts : Two interrupt entries must be specified. The first one is for
- main interrupt line and the second for MSI interrupt line.
- - #address-cells,
- #size-cells,
- #interrupt-cells,
- device_type,
- ranges,
- interrupt-map-mask,
- interrupt-map : as specified in ../designware-pcie.txt
- DEVICE MODE
- ===========
- - reg : Four register ranges as listed in the reg-names property
- - reg-names : "ti-conf" for the TI specific registers
- "ep_dbics" for the standard configuration registers as
- they are locally accessed within the DIF CS space
- "ep_dbics2" for the standard configuration registers as
- they are locally accessed within the DIF CS2 space
- "addr_space" used to map remote RC address space
- - interrupts : one interrupt entries must be specified for main interrupt.
- - num-ib-windows : number of inbound address translation windows
- - num-ob-windows : number of outbound address translation windows
- - syscon-legacy-mode: phandle to the syscon dt node. The 1st argument should
- contain the register offset within syscon and the 2nd
- argument should contain the bit field for setting the
- legacy mode
- Optional Property:
- - gpios : Should be added if a gpio line is required to drive PERST# line
- NOTE: Two dt nodes should be added for each PCI controller; one for host
- mode and another for device mode. So in order for PCI to
- work in host mode, EP mode dt node should be disabled and in order to PCI to
- work in EP mode, host mode dt node should be disabled. And host mode and EP
- mode are mutually exclusive.
- Example:
- axi {
- compatible = "simple-bus";
- #size-cells = <1>;
- #address-cells = <1>;
- ranges = <0x51000000 0x51000000 0x3000
- 0x0 0x20000000 0x10000000>;
- pcie@51000000 {
- compatible = "ti,dra7-pcie";
- reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
- reg-names = "rc_dbics", "ti_conf", "config";
- interrupts = <0 232 0x4>, <0 233 0x4>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0x03000 0 0x00010000
- 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
- #interrupt-cells = <1>;
- num-lanes = <1>;
- ti,hwmods = "pcie1";
- phys = <&pcie1_phy>;
- phy-names = "pcie-phy0";
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie_intc 1>,
- <0 0 0 2 &pcie_intc 2>,
- <0 0 0 3 &pcie_intc 3>,
- <0 0 0 4 &pcie_intc 4>;
- pcie_intc: interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- };
- };
- };
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