atmel-hlcdc.txt 1.5 KB

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  1. Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
  2. Required properties:
  3. - compatible: value should be one of the following:
  4. "atmel,at91sam9n12-hlcdc"
  5. "atmel,at91sam9x5-hlcdc"
  6. "atmel,sama5d2-hlcdc"
  7. "atmel,sama5d3-hlcdc"
  8. "atmel,sama5d4-hlcdc"
  9. - reg: base address and size of the HLCDC device registers.
  10. - clock-names: the name of the 3 clocks requested by the HLCDC device.
  11. Should contain "periph_clk", "sys_clk" and "slow_clk".
  12. - clocks: should contain the 3 clocks requested by the HLCDC device.
  13. - interrupts: should contain the description of the HLCDC interrupt line
  14. The HLCDC IP exposes two subdevices:
  15. - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt
  16. - a Display Controller: see ../display/atmel-hlcdc-dc.txt
  17. Example:
  18. hlcdc: hlcdc@f0030000 {
  19. compatible = "atmel,sama5d3-hlcdc";
  20. reg = <0xf0030000 0x2000>;
  21. clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
  22. clock-names = "periph_clk","sys_clk", "slow_clk";
  23. interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
  24. status = "disabled";
  25. hlcdc-display-controller {
  26. compatible = "atmel,hlcdc-display-controller";
  27. pinctrl-names = "default";
  28. pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
  29. #address-cells = <1>;
  30. #size-cells = <0>;
  31. port@0 {
  32. #address-cells = <1>;
  33. #size-cells = <0>;
  34. reg = <0>;
  35. hlcdc_panel_output: endpoint@0 {
  36. reg = <0>;
  37. remote-endpoint = <&panel_input>;
  38. };
  39. };
  40. };
  41. hlcdc_pwm: hlcdc-pwm {
  42. compatible = "atmel,hlcdc-pwm";
  43. pinctrl-names = "default";
  44. pinctrl-0 = <&pinctrl_lcd_pwm>;
  45. #pwm-cells = <3>;
  46. };
  47. };