imx-weim.txt 2.9 KB

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  1. Device tree bindings for i.MX Wireless External Interface Module (WEIM)
  2. The term "wireless" does not imply that the WEIM is literally an interface
  3. without wires. It simply means that this module was originally designed for
  4. wireless and mobile applications that use low-power technology.
  5. The actual devices are instantiated from the child nodes of a WEIM node.
  6. Required properties:
  7. - compatible: Should contain one of the following:
  8. "fsl,imx1-weim"
  9. "fsl,imx27-weim"
  10. "fsl,imx51-weim"
  11. "fsl,imx50-weim"
  12. "fsl,imx6q-weim"
  13. - reg: A resource specifier for the register space
  14. (see the example below)
  15. - clocks: the clock, see the example below.
  16. - #address-cells: Must be set to 2 to allow memory address translation
  17. - #size-cells: Must be set to 1 to allow CS address passing
  18. - ranges: Must be set up to reflect the memory layout with four
  19. integer values for each chip-select line in use:
  20. <cs-number> 0 <physical address of mapping> <size>
  21. Optional properties:
  22. - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
  23. devices, it should be the phandle to the system General
  24. Purpose Register controller that contains WEIM CS GPR
  25. register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
  26. should be set up as one of the following 4 possible
  27. values depending on the CS space configuration.
  28. IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
  29. ---------------------------------------------
  30. 05 128M 0M 0M 0M
  31. 033 64M 64M 0M 0M
  32. 0113 64M 32M 32M 0M
  33. 01111 32M 32M 32M 32M
  34. In case that the property is absent, the reset value or
  35. what bootloader sets up in IOMUXC_GPR1[11:0] will be
  36. used.
  37. Timing property for child nodes. It is mandatory, not optional.
  38. - fsl,weim-cs-timing: The timing array, contains timing values for the
  39. child node. We can get the CS index from the child
  40. node's "reg" property. The number of registers depends
  41. on the selected chip.
  42. For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
  43. registers: CSxU, CSxL.
  44. For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
  45. there are three registers: CSCRxU, CSCRxL, CSCRxA.
  46. For i.MX50, i.MX53 ("fsl,imx50-weim"),
  47. i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")
  48. there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,
  49. CSxRCR2, CSxWCR1, CSxWCR2.
  50. Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
  51. weim: weim@021b8000 {
  52. compatible = "fsl,imx6q-weim";
  53. reg = <0x021b8000 0x4000>;
  54. clocks = <&clks 196>;
  55. #address-cells = <2>;
  56. #size-cells = <1>;
  57. ranges = <0 0 0x08000000 0x08000000>;
  58. fsl,weim-cs-gpr = <&gpr>;
  59. nor@0,0 {
  60. compatible = "cfi-flash";
  61. reg = <0 0 0x02000000>;
  62. #address-cells = <1>;
  63. #size-cells = <1>;
  64. bank-width = <2>;
  65. fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
  66. 0x0000c000 0x1404a38e 0x00000000>;
  67. };
  68. };