/******************************************************************** * Copyright (C) 2003-2008 Texas Instruments Incorporated. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ #ifndef CSLR_TCP3D_DMA_H_ #define CSLR_TCP3D_DMA_H_ /* CSL Modification: * The file has been modified from the AUTOGEN file for the following * reasons:- * a) Modified the header file includes to be RTSC compliant */ #include #include /* Minimum unit = 1 byte */ /**************************************************************************\ * Register Overlay Structure \**************************************************************************/ typedef struct { volatile Uint32 TCP3D_IC_CFG0_P0; volatile Uint32 TCP3D_IC_CFG1_P0; volatile Uint32 TCP3D_IC_CFG2_P0; volatile Uint32 TCP3D_IC_CFG3_P0; volatile Uint32 TCP3D_IC_CFG4_P0; volatile Uint32 TCP3D_IC_CFG5_P0; volatile Uint32 TCP3D_IC_CFG6_P0; volatile Uint32 TCP3D_IC_CFG7_P0; volatile Uint32 TCP3D_IC_CFG8_P0; volatile Uint32 TCP3D_IC_CFG9_P0; volatile Uint32 TCP3D_IC_CFG10_P0; volatile Uint32 TCP3D_IC_CFG11_P0; volatile Uint32 TCP3D_IC_CFG12_P0; volatile Uint32 TCP3D_IC_CFG13_P0; volatile Uint32 TCP3D_IC_CFG14_P0; volatile Uint32 TCP3D_TRIG_P0; volatile Uint8 RSVD0[192]; volatile Uint32 TCP3D_OUT_STS0_P0; volatile Uint32 TCP3D_OUT_STS1_P0; volatile Uint32 TCP3D_OUT_STS2_P0; volatile Uint8 RSVD1[244]; volatile Uint32 TCP3D_IC_CFG0_P1; volatile Uint32 TCP3D_IC_CFG1_P1; volatile Uint32 TCP3D_IC_CFG2_P1; volatile Uint32 TCP3D_IC_CFG3_P1; volatile Uint32 TCP3D_IC_CFG4_P1; volatile Uint32 TCP3D_IC_CFG5_P1; volatile Uint32 TCP3D_IC_CFG6_P1; volatile Uint32 TCP3D_IC_CFG7_P1; volatile Uint32 TCP3D_IC_CFG8_P1; volatile Uint32 TCP3D_IC_CFG9_P1; volatile Uint32 TCP3D_IC_CFG10_P1; volatile Uint32 TCP3D_IC_CFG11_P1; volatile Uint32 TCP3D_IC_CFG12_P1; volatile Uint32 TCP3D_IC_CFG13_P1; volatile Uint32 TCP3D_IC_CFG14_P1; volatile Uint32 TCP3D_TRIG_P1; volatile Uint8 RSVD2[192]; volatile Uint32 TCP3D_OUT_STS0_P1; volatile Uint32 TCP3D_OUT_STS1_P1; volatile Uint32 TCP3D_OUT_STS2_P1; } CSL_Tcp3d_dmaRegs; /**************************************************************************\ * Field Definition Macros \**************************************************************************/ /* TCP3d_IC_CFG0_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_NUM_SW0_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_NUM_SW0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_NUM_SW0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_BLK_LN_MASK (0x1FFF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_BLK_LN_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_BLK_LN_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG1_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL_MASK (0x00000007u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL_SHIFT (0x00000000u) /*----SW0_LN_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL_SW0_16 (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL_SW0_32 (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL_SW0_48 (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL_SW0_64 (0x00000003u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL_SW0_96 (0x00000004u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW0_LN_SEL_SW0_128 (0x00000005u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW2_LN_SEL_MASK (0x00000030u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW2_LN_SEL_SHIFT (0x00000004u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW2_LN_SEL_RESETVAL (0x00000000u) /*----SW2_LN_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW2_LN_SEL_OFF (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW2_LN_SEL_SW2_SW1 (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW2_LN_SEL_SW2_SW2_2 (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW1_LN_MASK (0x00007F00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW1_LN_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_SW1_LN_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG2_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_INTER_LOAD_SEL_MASK (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_INTER_LOAD_SEL_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_INTER_LOAD_SEL_RESETVAL (0x00000000u) /*----INTER_LOAD_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_INTER_LOAD_SEL_NOT_SET (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_INTER_LOAD_SEL_SET (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MAXST_EN_MASK (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MAXST_EN_SHIFT (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MAXST_EN_RESETVAL (0x00000000u) /*----MAXST_EN Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MAXST_EN_DISABLED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MAXST_EN_ENABLED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_FLAG_EN_MASK (0x00000004u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_FLAG_EN_SHIFT (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_FLAG_EN_RESETVAL (0x00000000u) /*----OUT_FLAG_EN Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_FLAG_EN_NOT_READ (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_FLAG_EN_READ (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_MASK (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_SHIFT (0x00000003u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_RESETVAL (0x00000000u) /*----OUT_ORDER_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_NO_SWAP (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_OUT_ORDER_SEL_SWAP (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_EXT_SCALE_EN_MASK (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_EXT_SCALE_EN_SHIFT (0x00000004u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_EXT_SCALE_EN_RESETVAL (0x00000000u) /*----EXT_SCALE_EN Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_EXT_SCALE_EN_DISABLED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_EXT_SCALE_EN_ENABLED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FLAG_EN_MASK (0x00000020u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FLAG_EN_SHIFT (0x00000005u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FLAG_EN_RESETVAL (0x00000000u) /*----SOFT_OUT_FLAG_EN Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FLAG_EN_NOT_READ (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FLAG_EN_READ (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_MASK (0x00000040u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_RESETVAL (0x00000000u) /*----SOFT_OUT_ORDER_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_32_BIT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_ORDER_SEL_8_BIT (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FMT_MASK (0x00000080u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FMT_SHIFT (0x00000007u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FMT_RESETVAL (0x00000000u) /*----SOFT_OUT_FMT Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FMT_TRUNCATED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SOFT_OUT_FMT_SATURATED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MIN_ITR_MASK (0x00000F00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MIN_ITR_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MIN_ITR_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MAX_ITR_MASK (0x0000F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MAX_ITR_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_MAX_ITR_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_VAL_MASK (0x001F0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_VAL_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_VAL_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_REP_MASK (0x00200000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_REP_SHIFT (0x00000015u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_REP_RESETVAL (0x00000000u) /*----SNR_REP Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_REP_DISABLED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_SNR_REP_ENABLED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_STOP_SEL_MASK (0x00C00000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_STOP_SEL_SHIFT (0x00000016u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_STOP_SEL_RESETVAL (0x00000000u) /*----STOP_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_STOP_SEL_MAX_ITR (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_STOP_SEL_MAX_ITR_OR_CRC (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_STOP_SEL_MAX_ITR_SNR0 (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_STOP_SEL_MAX_ITR_SNR1 (0x00000003u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_ITER_PASS_MASK (0x03000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_ITER_PASS_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_ITER_PASS_RESETVAL (0x00000000u) /*----CRC_ITER_PASS Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_ITER_PASS_MATCH1 (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_ITER_PASS_MATCH2 (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_ITER_PASS_MATCH3 (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_ITER_PASS_MATCH4 (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_SEL_MASK (0x04000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_SEL_SHIFT (0x0000001Au) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_SEL_RESETVAL (0x00000000u) /*----CRC_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_SEL_CODE_BLOCK (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_CRC_SEL_TRANSPORT_BLOCK (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG3_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P0_MAXST_THOLD_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P0_MAXST_THOLD_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P0_MAXST_THOLD_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P0_MAXST_VALUE_MASK (0x003F0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P0_MAXST_VALUE_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P0_MAXST_VALUE_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG4_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST0_MAP0_MASK (0x000000FFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST0_MAP0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST0_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST1_MAP0_MASK (0x0000FF00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST1_MAP0_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST1_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST2_MAP0_MASK (0x00FF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST2_MAP0_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST2_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST3_MAP0_MASK (0xFF000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST3_MAP0_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_BETA_ST3_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG5_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST4_MAP0_MASK (0x000000FFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST4_MAP0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST4_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST5_MAP0_MASK (0x0000FF00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST5_MAP0_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST5_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST6_MAP0_MASK (0x00FF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST6_MAP0_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST6_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST7_MAP0_MASK (0xFF000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST7_MAP0_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_BETA_ST7_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG6_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST0_MAP1_MASK (0x000000FFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST0_MAP1_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST0_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST1_MAP1_MASK (0x0000FF00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST1_MAP1_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST1_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST2_MAP1_MASK (0x00FF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST2_MAP1_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST2_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST3_MAP1_MASK (0xFF000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST3_MAP1_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_BETA_ST3_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG7_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST4_MAP1_MASK (0x000000FFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST4_MAP1_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST4_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST5_MAP1_MASK (0x0000FF00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST5_MAP1_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST5_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST6_MAP1_MASK (0x00FF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST6_MAP1_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST6_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST7_MAP1_MASK (0xFF000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST7_MAP1_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_BETA_ST7_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG8_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_0_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_1_MASK (0x00000FC0u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_1_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_2_MASK (0x0003F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_2_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_2_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_3_MASK (0x00FC0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_3_SHIFT (0x00000012u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_EXT_SCALE_3_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG9_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_4_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_4_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_4_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_5_MASK (0x00000FC0u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_5_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_5_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_6_MASK (0x0003F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_6_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_6_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_7_MASK (0x00FC0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_7_SHIFT (0x00000012u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_EXT_SCALE_7_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG10_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_8_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_8_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_8_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_9_MASK (0x00000FC0u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_9_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_9_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_10_MASK (0x0003F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_10_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_10_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_11_MASK (0x00FC0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_11_SHIFT (0x00000012u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_EXT_SCALE_11_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG11_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_12_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_12_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_12_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_13_MASK (0x00000FC0u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_13_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_13_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_14_MASK (0x0003F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_14_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_14_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_15_MASK (0x00FC0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_15_SHIFT (0x00000012u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_EXT_SCALE_15_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG12_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM0_MASK (0x00001FFFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM1_MASK (0x1FFF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM1_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P0_ITG_PARAM1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG13_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM2_MASK (0x00001FFFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM2_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM2_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM3_MASK (0x1FFF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM3_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P0_ITG_PARAM3_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG14_P0 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG14_P0_ITG_PARAM4_MASK (0x00001FFFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG14_P0_ITG_PARAM4_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG14_P0_ITG_PARAM4_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG14_P0_RESETVAL (0x00000000u) /* TCP3d_TRIG_P0 */ #define CSL_TCP3D_DMA_TCP3D_TRIG_P0_TRIG_MASK (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_TRIG_P0_TRIG_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_TRIG_P0_TRIG_RESETVAL (0x00000000u) /*----TRIG Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_TRIG_P0_TRIG_NO_TRIGGER (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_TRIG_P0_TRIG_TRIGGER (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_TRIG_P0_RESETVAL (0x00000000u) /* TCP3d_OUT_STS0_P0 */ #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_SNR_M1_MASK (0x0003FFFFu) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_SNR_M1_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_SNR_M1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_FINAL_IT_MASK (0x0F000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_FINAL_IT_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_FINAL_IT_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P0_RESETVAL (0x00000000u) /* TCP3d_OUT_STS1_P0 */ #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_SNR_M2_MASK (0x003FFFFFu) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_SNR_M2_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_SNR_M2_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_LTE_CRC_CHK_MASK (0x20000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_LTE_CRC_CHK_SHIFT (0x0000001Du) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_LTE_CRC_CHK_RESETVAL (0x00000000u) /*----LTE_CRC_CHK Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_LTE_CRC_CHK_FAILED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_LTE_CRC_CHK_PASSED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_SNR_EXCEED_MASK (0xC0000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_SNR_EXCEED_SHIFT (0x0000001Eu) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_SNR_EXCEED_RESETVAL (0x00000000u) /*----SNR_EXCEED Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_SNR_EXCEED_FAILED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_SNR_EXCEED_PASSED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P0_RESETVAL (0x00000000u) /* TCP3d_OUT_STS2_P0 */ #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P0_CNT_CQI_MASK (0x00003FFFu) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P0_CNT_CQI_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P0_CNT_CQI_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P0_CNT_CQI_ZERO_MASK (0x3FFF0000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P0_CNT_CQI_ZERO_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P0_CNT_CQI_ZERO_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P0_RESETVAL (0x00000000u) /* TCP3d_IC_CFG0_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_NUM_SW0_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_NUM_SW0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_NUM_SW0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_BLK_LN_MASK (0x1FFF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_BLK_LN_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_BLK_LN_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG0_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG1_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_MASK (0x00000007u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_RESETVAL (0x00000000u) /*----SW0_LN_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_SW0_16 (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_SW0_32 (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_SW0_48 (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_SW0_64 (0x00000003u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_SW0_96 (0x00000004u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW0_LN_SEL_SW0_128 (0x00000005u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW2_LN_SEL_MASK (0x00000030u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW2_LN_SEL_SHIFT (0x00000004u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW2_LN_SEL_RESETVAL (0x00000000u) /*----SW2_LN_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW2_LN_SEL_OFF (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW2_LN_SEL_SW2_SW1 (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW2_LN_SEL_SW2_SW2_2 (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW1_LN_MASK (0x00007F00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW1_LN_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_SW1_LN_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG1_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG2_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_INTER_LOAD_SEL_MASK (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_INTER_LOAD_SEL_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_INTER_LOAD_SEL_RESETVAL (0x00000000u) /*----INTER_LOAD_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_INTER_LOAD_SEL_NOT_SET (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_INTER_LOAD_SEL_SET (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MAXST_EN_MASK (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MAXST_EN_SHIFT (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MAXST_EN_RESETVAL (0x00000000u) /*----MAXST_EN Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MAXST_EN_DISABLED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MAXST_EN_ENABLED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_FLAG_EN_MASK (0x00000004u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_FLAG_EN_SHIFT (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_FLAG_EN_RESETVAL (0x00000000u) /*----OUT_FLAG_EN Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_FLAG_EN_NOT_READ (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_FLAG_EN_READ (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_ORDER_SEL_MASK (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_ORDER_SEL_SHIFT (0x00000003u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_ORDER_SEL_RESETVAL (0x00000000u) /*----OUT_ORDER_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_ORDER_SEL_NO_SWAP (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_OUT_ORDER_SEL_SWAP (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_EXT_SCALE_EN_MASK (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_EXT_SCALE_EN_SHIFT (0x00000004u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_EXT_SCALE_EN_RESETVAL (0x00000000u) /*----EXT_SCALE_EN Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_EXT_SCALE_EN_DISABLED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_EXT_SCALE_EN_ENABLED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FLAG_EN_MASK (0x00000020u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FLAG_EN_SHIFT (0x00000005u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FLAG_EN_RESETVAL (0x00000000u) /*----SOFT_OUT_FLAG_EN Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FLAG_EN_NOT_READ (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FLAG_EN_READ (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_ORDER_SEL_MASK (0x00000040u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_ORDER_SEL_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_ORDER_SEL_RESETVAL (0x00000000u) /*----SOFT_OUT_ORDER_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_ORDER_SEL_32_BIT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_ORDER_SEL_8_BIT (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FMT_MASK (0x00000080u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FMT_SHIFT (0x00000007u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FMT_RESETVAL (0x00000000u) /*----SOFT_OUT_FMT Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FMT_TRUNCATED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SOFT_OUT_FMT_SATURATED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MIN_ITR_MASK (0x00000F00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MIN_ITR_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MIN_ITR_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MAX_ITR_MASK (0x0000F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MAX_ITR_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_MAX_ITR_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SNR_VAL_MASK (0x001F0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SNR_VAL_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SNR_VAL_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SNR_REP_MASK (0x00200000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SNR_REP_SHIFT (0x00000015u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SNR_REP_RESETVAL (0x00000000u) /*----SNR_REP Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SNR_REP_DISABLED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_SNR_REP_ENABLED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_STOP_SEL_MASK (0x00C00000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_STOP_SEL_SHIFT (0x00000016u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_STOP_SEL_RESETVAL (0x00000000u) /*----STOP_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_STOP_SEL_MAX_ITR (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_STOP_SEL_MAX_ITR_OR_CRC (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_STOP_SEL_MAX_ITR_SNR0 (0x00000002u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_STOP_SEL_MAX_ITR_SNR1 (0x00000003u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_ITER_PASS_MASK (0x03000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_ITER_PASS_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_ITER_PASS_RESETVAL (0x00000000u) /*----CRC_ITER_PASS Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_ITER_PASS_MATCH1 (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_ITER_PASS_MATCH2 (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_ITER_PASS_MATCH3 (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_ITER_PASS_MATCH4 (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_SEL_MASK (0x04000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_SEL_SHIFT (0x0000001Au) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_SEL_RESETVAL (0x00000000u) /*----CRC_SEL Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_SEL_CODE_BLOCK (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_CRC_SEL_TRANSPORT_BLOCK (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG2_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG3_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P1_MAXST_THOLD_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P1_MAXST_THOLD_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P1_MAXST_THOLD_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P1_MAXST_VALUE_MASK (0x003F0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P1_MAXST_VALUE_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P1_MAXST_VALUE_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG3_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG4_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST0_MAP0_MASK (0x000000FFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST0_MAP0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST0_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST1_MAP0_MASK (0x0000FF00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST1_MAP0_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST1_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST2_MAP0_MASK (0x00FF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST2_MAP0_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST2_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST3_MAP0_MASK (0xFF000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST3_MAP0_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_BETA_ST3_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG4_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG5_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST4_MAP0_MASK (0x000000FFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST4_MAP0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST4_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST5_MAP0_MASK (0x0000FF00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST5_MAP0_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST5_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST6_MAP0_MASK (0x00FF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST6_MAP0_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST6_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST7_MAP0_MASK (0xFF000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST7_MAP0_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_BETA_ST7_MAP0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG5_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG6_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST0_MAP1_MASK (0x000000FFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST0_MAP1_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST0_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST1_MAP1_MASK (0x0000FF00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST1_MAP1_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST1_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST2_MAP1_MASK (0x00FF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST2_MAP1_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST2_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST3_MAP1_MASK (0xFF000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST3_MAP1_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_BETA_ST3_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG6_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG7_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST4_MAP1_MASK (0x000000FFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST4_MAP1_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST4_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST5_MAP1_MASK (0x0000FF00u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST5_MAP1_SHIFT (0x00000008u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST5_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST6_MAP1_MASK (0x00FF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST6_MAP1_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST6_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST7_MAP1_MASK (0xFF000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST7_MAP1_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_BETA_ST7_MAP1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG7_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG8_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_0_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_1_MASK (0x00000FC0u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_1_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_2_MASK (0x0003F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_2_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_2_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_3_MASK (0x00FC0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_3_SHIFT (0x00000012u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_EXT_SCALE_3_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG8_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG9_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_4_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_4_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_4_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_5_MASK (0x00000FC0u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_5_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_5_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_6_MASK (0x0003F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_6_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_6_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_7_MASK (0x00FC0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_7_SHIFT (0x00000012u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_EXT_SCALE_7_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG9_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG10_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_8_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_8_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_8_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_9_MASK (0x00000FC0u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_9_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_9_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_10_MASK (0x0003F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_10_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_10_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_11_MASK (0x00FC0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_11_SHIFT (0x00000012u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_EXT_SCALE_11_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG10_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG11_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_12_MASK (0x0000003Fu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_12_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_12_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_13_MASK (0x00000FC0u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_13_SHIFT (0x00000006u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_13_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_14_MASK (0x0003F000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_14_SHIFT (0x0000000Cu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_14_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_15_MASK (0x00FC0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_15_SHIFT (0x00000012u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_EXT_SCALE_15_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG11_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG12_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P1_ITG_PARAM0_MASK (0x00001FFFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P1_ITG_PARAM0_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P1_ITG_PARAM0_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P1_ITG_PARAM1_MASK (0x1FFF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P1_ITG_PARAM1_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P1_ITG_PARAM1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG12_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG13_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P1_ITG_PARAM2_MASK (0x00001FFFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P1_ITG_PARAM2_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P1_ITG_PARAM2_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P1_ITG_PARAM3_MASK (0x1FFF0000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P1_ITG_PARAM3_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P1_ITG_PARAM3_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG13_P1_RESETVAL (0x00000000u) /* TCP3d_IC_CFG14_P1 */ #define CSL_TCP3D_DMA_TCP3D_IC_CFG14_P1_ITG_PARAM4_MASK (0x00001FFFu) #define CSL_TCP3D_DMA_TCP3D_IC_CFG14_P1_ITG_PARAM4_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG14_P1_ITG_PARAM4_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_IC_CFG14_P1_RESETVAL (0x00000000u) /* TCP3d_TRIG_P1 */ #define CSL_TCP3D_DMA_TCP3D_TRIG_P1_TRIG_MASK (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_TRIG_P1_TRIG_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_TRIG_P1_TRIG_RESETVAL (0x00000000u) /*----TRIG Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_TRIG_P1_TRIG_NO_TRIGGER (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_TRIG_P1_TRIG_TRIGGER (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_TRIG_P1_RESETVAL (0x00000000u) /* TCP3d_OUT_STS0_P1 */ #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_SNR_M1_MASK (0x0003FFFFu) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_SNR_M1_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_SNR_M1_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_FINAL_IT_MASK (0x0F000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_FINAL_IT_SHIFT (0x00000018u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_FINAL_IT_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS0_P1_RESETVAL (0x00000000u) /* TCP3d_OUT_STS1_P1 */ #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_SNR_M2_MASK (0x003FFFFFu) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_SNR_M2_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_SNR_M2_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_LTE_CRC_CHK_MASK (0x20000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_LTE_CRC_CHK_SHIFT (0x0000001Du) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_LTE_CRC_CHK_RESETVAL (0x00000000u) /*----LTE_CRC_CHK Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_LTE_CRC_CHK_FAILED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_LTE_CRC_CHK_PASSED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_SNR_EXCEED_MASK (0xC0000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_SNR_EXCEED_SHIFT (0x0000001Eu) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_SNR_EXCEED_RESETVAL (0x00000000u) /*----SNR_EXCEED Tokens----*/ #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_SNR_EXCEED_FAILED (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_SNR_EXCEED_PASSED (0x00000001u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS1_P1_RESETVAL (0x00000000u) /* TCP3d_OUT_STS2_P1 */ #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P1_CNT_CQI_MASK (0x00003FFFu) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P1_CNT_CQI_SHIFT (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P1_CNT_CQI_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P1_CNT_CQI_ZERO_MASK (0x3FFF0000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P1_CNT_CQI_ZERO_SHIFT (0x00000010u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P1_CNT_CQI_ZERO_RESETVAL (0x00000000u) #define CSL_TCP3D_DMA_TCP3D_OUT_STS2_P1_RESETVAL (0x00000000u) #endif