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/********************************************************************
* file: cslr_iqn2.h
*
* Brief: This file contains the Register Description for IQN2
*
*********************************************************************/
#ifndef CSLR_IQN2_H_
#define CSLR_IQN2_H_

#include <ti/csl/cslr.h>
#include <ti/csl/tistdtypes.h>

#include <ti/csl/src/ip/iqn2/V0/cslr_iqn2_top.h>
#include <ti/csl/src/ip/iqn2/V0/cslr_iqn_at2.h>
#include <ti/csl/src/ip/iqn2/V0/cslr_iqn_iqs2.h>
#include <ti/csl/src/ip/iqn2/V0/cslr_iqn_aid2.h>
#include <ti/csl/src/ip/iqn2/V0/cslr_iqn_dio2.h>
#include <ti/csl/src/ip/iqn2/V0/cslr_iqn2_cdmahp.h>
#include <ti/csl/src/ip/iqn2/V0/cslr_iqn_ail.h>

/* Minimum unit = 1 byte */

/**************************************************************************\
* Register Overlay Structure for IQN2
\**************************************************************************/
typedef struct  {
    CSL_Iqn2_topRegs      Top;    /* offset 0x00_0000 to 0x00_FFFF  sub modules VC, EE and PSR */
    CSL_Iqn_at2Regs       At2;    /* offset 0x01_0000 to 0x01_FFFF  sub_module AT */
    CSL_Iqn_iqs2Regs      Iqs2;   /* offset 0x02_0000 to 0x03_FFFF  sub_module IQS */
    CSL_Iqn_aid2Regs      Aid2;   /* offset 0x04_0000 to 0x05_FFFF  sub_module AID */
    CSL_Iqn_dio2Regs      Dio2;   /* offset 0x06_0000 to 0x0F_FFFF  sub_module DIO */
    CSL_Iqn2_cdmahpRegs   CdmaHp; /* offset 0x10_0000 to 0x1F_FFFF  sub_module CDMAHP */
    CSL_Iqn_ailRegs       Ail[2]; /* offset 0x20_0000 to 0x23_FFFF (AIL0), offset 24_0000 to 27_FFFF (AIL1) */
} CSL_Iqn2Regs;

#endif