/* ============================================================================ * Copyright (c) Texas Instruments Incorporated 2002, 2003, 2004, 2005, 2006, 2008 2016 * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** ============================================================================ * \file cslr.h * * \brief This file contains the macro definations for Register layer * */ /* Register layer central -- contains field-manipulation macro definitions */ #ifndef CSLR_H #define CSLR_H /* the "expression" macros */ /* the Field MaKe macro */ #define CSL_FMK(PER_REG_FIELD, val) \ (((val) << CSL_##PER_REG_FIELD##_SHIFT) & CSL_##PER_REG_FIELD##_MASK) /* the Field EXTract macro */ #define CSL_FEXT(reg, PER_REG_FIELD) \ (((reg) & CSL_##PER_REG_FIELD##_MASK) >> CSL_##PER_REG_FIELD##_SHIFT) /* the Field INSert macro */ #define CSL_FINS(reg, PER_REG_FIELD, val) \ ((reg) = ((reg) & ~CSL_##PER_REG_FIELD##_MASK) \ | (((val) << CSL_##PER_REG_FIELD##_SHIFT) & CSL_##PER_REG_FIELD##_MASK)) /* the "token" macros */ /* the Field MaKe (Token) macro */ #define CSL_FMKT(PER_REG_FIELD, TOKEN) \ (((CSL_##PER_REG_FIELD##_##TOKEN) << CSL_##PER_REG_FIELD##_SHIFT) & CSL_##PER_REG_FIELD##_MASK) /* the Field INSert (Token) macro */ #define CSL_FINST(reg, PER_REG_FIELD, TOKEN) \ ((reg) = ((reg) & ~CSL_##PER_REG_FIELD##_MASK) \ | (((CSL_##PER_REG_FIELD##_##TOKEN) << CSL_##PER_REG_FIELD##_SHIFT) & CSL_##PER_REG_FIELD##_MASK)) /* the "raw" macros */ #define kw_val (1u) \ /* the Field MaKe (Raw) macro */ #define CSL_FMKR(msb, lsb, val) \ (((val) & ((((uint32_t)1U) << ((msb) - (lsb) + ((uint32_t)1U))) - ((uint32_t)1U))) << (lsb)) /* the Field EXTract (Raw) macro */ #define CSL_FEXTR(reg, msb, lsb) \ (((reg) >> (lsb)) & ((((uint32_t)1U) << ((msb) - (lsb) + ((uint32_t)1U))) - ((uint32_t)1U))) /* the Field INSert (Raw) macro */ #define CSL_FINSR(reg, msb, lsb, val) \ ((reg) = ((reg) & (~(((((uint32_t)1U) << ((msb) - (lsb) + ((uint32_t)1U))) - ((uint32_t)1U)) << (lsb)))) \ | CSL_FMKR((msb), (lsb), (val))) #endif /* CSLR_H_ */ /** * \mainpage Chip Support Library * * \par IMPORTANT NOTE * * The interfaces defined in this package are bound to change. * Kindly treat the interfaces as work in progress. * Release notes/user guide list the additional limitation/restriction * of this module/interfaces. * See also \ref TI_DISCLAIMER. * * * Chip Support Library(CSL) provides a no-OS platform support for * multi-core SoCs. CSL provides CSL Functional Layer (CSL-FL) libraries and * CSL Register Layer (CSL-R) along with peripheral/board level sample/demo * examples that demonstrate the capabilities of the peripherals. * * * Also refer to top level user guide for detailed features, * limitations and usage description. * * * The CSL-FL includes the following modules/drivers * - HW Type Defines (See \ref HW_TYPES)
* In-line functions required to read/write values from/to the hardware registers * * - IP's
* - System Module
* - EDMA (See \ref CSL_EDMA)
* - EPWM (See \ref CSL_EPWM)
* - GPIO (See \ref CSL_GPIO)
* - Mailbox (See \ref CSL_MAILBOX)
* - MMU (See \ref CSL_MMU)
* - Spinlock (See \ref CSL_SPINLOCK)
* - Timer (See \ref CSL_TIMER)
* - WD Timer (See \ref CSL_WD_TIMER)
* - Safety/Security Module
* - ADC (See \ref CSL_ADC)
* - CRC (See \ref CSL_CRC)
* - DCC (See \ref CSL_DCC)
* - ESM (See \ref CSL_ESM)
* - L4 Firewall (See \ref CSL_L3_FIREWALL)
* - L4 Firewall (See \ref CSL_L4_FIREWALL)
* - Tesoc (See \ref CSL_TESOC)
* - RTI (See \ref CSL_RTI)
* - Serial Module
* - DCAN (See \ref CSL_DCAN)
* - I2C (See \ref CSL_I2C)
* - MCAN (See \ref CSL_MCAN)
* - McSPI (See \ref CSL_MCSPI)
* - QSPI (See \ref CSL_QSPI)
* - UART (See \ref CSL_UART)
* - PCIe (See \ref CSL_PCIE)
* - Memory Controller
* - EMIF (See \ref CSL_EMIF)
* - GPMC (See \ref CSL_GPMC)
* - OCMC (See \ref CSL_IP_MODULE_OCMC)
* - Memory/Storage
* - MMCSD (See \ref CSL_MMCSD)
* * - SOC Module
* This Module contain the SOC level configuration API's such as cross bar configuration, cross bar defines, SOC defines * - Device Common API's (See \ref CSL_DEVICE_COMMON)
* - TDA2EX (See \ref SOC_TDA2EX)
* - TDA2PX (See \ref SOC_TDA2PX)
* - TDA2XX (See \ref SOC_TDA2XX)
* - TDA3XX (See \ref SOC_TDA3XX)
* * - ARCH Module
* This Module contain the core specific configuration API's such as Interrupt, Cache, ECC * - A15 (See \ref CSL_ARCH_A15)
* - DSP-C66x (See \ref CSL_ARCH_C66X)
* - M4 (See \ref CSL_ARCH_M4)
* - EVE (See \ref CSL_ARCH_ARP32)
*/ /** * \page TI_DISCLAIMER TI Disclaimer * * \htmlinclude ti_disclaim.htm */